From patchwork Mon Nov 13 11:25:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 16504 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b909:0:b0:403:3b70:6f57 with SMTP id t9csp1136240vqg; Mon, 13 Nov 2023 03:27:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IFQo285K/hRKo7PW+K0AGLi/IOCKx1myo3nDCaYahCGU7MqGgDQvA4U6llthvDdUmBuUgN5 X-Received: by 2002:a17:90b:224c:b0:281:3a9b:156 with SMTP id hk12-20020a17090b224c00b002813a9b0156mr4158205pjb.1.1699874861403; Mon, 13 Nov 2023 03:27:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699874861; cv=none; d=google.com; s=arc-20160816; b=JhejWjylkEG2WOvA9DkyYDlBfFg0WKUHItBBfvVaUB/tXeN4LdsVMvzJTbtNlQMGO4 AITUdCPZKZwTkQhslMs1WmpZWXYukpSa9z8CwJIo4/vi3+FsXutz3yjO3FUC2f0d8xCo EgsyC5W975hyJgTcj0wVK9cOv+zf6726Urn1zxDXedqox+UwKwOegDhYkzMwGMm5SrAV RrdoJQo5OyBpyNMizZKtEQP8t+LQFANOgn2z0DyLnNyZQCndZPhfMcfXIO/wKmTvmI3k 1JKcvGiAnfEazNEeEI2srswYTU45VRwVWxx+4L7ycIko9BsMaNLIyvmcQ3Wr579WhSik 07fg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=ixE+dtx4gM0SafWxVubuIst8Tn3sEKZ6QqKb1yLYKTQ=; fh=SnCd4bvG88NEfyCdvKK/GXg69kKL/C759z8uFsR/n/U=; b=sTTugKui382eA5snrbj4CmcmJCPYvVbstcEwnYeeJy3VNlZLh+/l/LmPVXfKip7h07 EZCBcTkbsEydk+MhL1dLW1/dJKTcLKed22aPdRtztGZMNMJwMsuOxSEcKSG0RPfyIRAg Wz7fRWRN1dEYrktmNSp/FF8PiV4nVo/KRg/YzfsYI+8K2yt/b5SpVy6+Eeh7ZlyT2Pma tXH/Vnooy/T+DyIpVzEgF4rZqAlqMkaDvTRz0OIazLytz4RaPKoQfVoXaIKBPwMGQWpU Nl4ROPSeWyXhwAbyD5cVyPl9IridBS3wtTh6MLC0FGSdcX8KqBp1fwyG8SEtX64flxSW EQdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from lipwig.vger.email (lipwig.vger.email. [23.128.96.33]) by mx.google.com with ESMTPS id k1-20020a170902c40100b001ca110d482csi5955860plk.573.2023.11.13.03.27.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 03:27:41 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 11CAD809717A; Mon, 13 Nov 2023 03:27:37 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231846AbjKML1U (ORCPT + 29 others); Mon, 13 Nov 2023 06:27:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231812AbjKML1G (ORCPT ); Mon, 13 Nov 2023 06:27:06 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 149404781; Mon, 13 Nov 2023 03:26:05 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6983DDA7; Mon, 13 Nov 2023 03:26:38 -0800 (PST) Received: from e127643.arm.com (unknown [10.57.71.191]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5B59F3F6C4; Mon, 13 Nov 2023 03:25:50 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, suzuki.poulose@arm.com, will@kernel.org, mark.rutland@arm.com Cc: James Clark , Catalin Marinas , Jonathan Corbet , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 0/3] arm64: perf: Add support for event counting threshold Date: Mon, 13 Nov 2023 11:25:03 +0000 Message-Id: <20231113112507.917107-1-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 13 Nov 2023 03:27:37 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782447982526212390 X-GMAIL-MSGID: 1782447982526212390 Changes since v4: * Rebase onto v6.7-rc1, it no longer depends on kvmarm/next * Remove change that moved ARMV8_PMU_EVTYPE_MASK to the asm files. This actually depended on those files being included in a certain order with arm_pmuv3.h to avoid circular includes. Now the definition is done programmatically in arm_pmuv3.c instead. Changes since v3: * Drop #include changes to KVM source files because since commit bc512d6a9b92 ("KVM: arm64: Make PMEVTYPER_EL0.NSH RES0 if EL2 isn't advertised"), KVM doesn't use ARMV8_PMU_EVTYPE_MASK anymore Changes since v2: * Split threshold_control attribute into two, threshold_compare and threshold_count so that it's easier to use * Add some notes to the first commit message and the cover letter about the behavior in KVM * Update the docs commit with regards to the split attribute Changes since v1: * Fix build on aarch32 by disabling FEAT_PMUv3_TH and splitting event type mask between the platforms * Change armv8pmu_write_evtype() to take unsigned long instead of u64 so it isn't unnecessarily wide on aarch32 * Add UL suffix to aarch64 event type mask definition ---- FEAT_PMUv3_TH (Armv8.8) is a new feature that allows conditional counting of PMU events depending on how much the event increments on a single cycle. Two new config fields for perf_event_open have been added, and a PMU cap file for reading the max_threshold. See the second commit message and the docs in the last commit for more details. The feature is not currently supported on KVM guests, and PMMIR is set to read as zero, so it's not advertised as available. But it can be added at a later time. Writes to PMEVTYPER.TC and TH from guests are already RES0. The change has been validated on the Arm FVP model: # Zero values, works as expected (as before). $ perf stat -e dtlb_walk/threshold=0,threshold_compare=0/ -- true 5962 dtlb_walk/threshold=0,threshold_compare=0/ # Threshold >= 255 causes count to be 0 because dtlb_walk doesn't # increase by more than 1 per cycle. $ perf stat -e dtlb_walk/threshold=255,threshold_compare=2/ -- true 0 dtlb_walk/threshold=255,threshold_compare=2/ # Keeping comparison as >= but lowering the threshold to 1 makes the # count return. $ perf stat -e dtlb_walk/threshold=1,threshold_compare=2/ -- true 6329 dtlb_walk/threshold=1,threshold_compare=2/ James Clark (3): arm64: perf: Include threshold control fields in PMEVTYPER mask arm64: perf: Add support for event counting threshold Documentation: arm64: Document the PMU event counting threshold feature Documentation/arch/arm64/perf.rst | 56 ++++++++++++++++++++ drivers/perf/arm_pmuv3.c | 88 ++++++++++++++++++++++++++++++- include/linux/perf/arm_pmuv3.h | 4 +- 3 files changed, 145 insertions(+), 3 deletions(-) base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86