mbox series

[v3,0/3] LoongArch: KVM: Remove SW timer switch when vcpu is halt polling

Message ID 20231110090529.56950-1-maobibo@loongson.cn
Headers
Series LoongArch: KVM: Remove SW timer switch when vcpu is halt polling |

Message

maobibo Nov. 10, 2023, 9:05 a.m. UTC 
  This patches removes SW timer switch during vcpu block stage. VM uses HW
timer rather than SW PV timer on LoongArch system, it can check pending
HW timer interrupt status directly, rather than switch to SW timer and
check injected SW timer interrupt.

When SW timer is not used in vcpu halt-polling mode, the relative
SW timer handling before entering guest can be removed also. Timer
emulation is simpler than before, SW timer emuation is only used in vcpu
thread context switch.

---

Changes in v3:
  Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.

Changes in v2:
  Add halt polling support for idle instruction emulation, using api
kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.

---

Bibo Mao (3):
  LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
  LoongArch: KVM: Allow to access HW timer CSR registers always
  LoongArch: KVM: Remove kvm_acquire_timer before entering guest

 arch/loongarch/include/asm/kvm_vcpu.h |  1 -
 arch/loongarch/kvm/exit.c             | 13 ++------
 arch/loongarch/kvm/main.c             |  1 -
 arch/loongarch/kvm/timer.c            | 47 +++++++--------------------
 arch/loongarch/kvm/vcpu.c             | 38 +++++-----------------
 5 files changed, 22 insertions(+), 78 deletions(-)


base-commit: 305230142ae0637213bf6e04f6d9f10bbcb74af8

Comments

Huacai Chen Nov. 13, 2023, 2:36 p.m. UTC | #1 
Hi, Bibo,

Does this series have some relationship with the commit
"LoongArch:LSVZ: set timer offset at first time once" in our internal
repo?

Huacai

On Fri, Nov 10, 2023 at 5:07 PM Bibo Mao <maobibo@loongson.cn> wrote:
>
> This patches removes SW timer switch during vcpu block stage. VM uses HW
> timer rather than SW PV timer on LoongArch system, it can check pending
> HW timer interrupt status directly, rather than switch to SW timer and
> check injected SW timer interrupt.
>
> When SW timer is not used in vcpu halt-polling mode, the relative
> SW timer handling before entering guest can be removed also. Timer
> emulation is simpler than before, SW timer emuation is only used in vcpu
> thread context switch.
>
> ---
>
> Changes in v3:
>   Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.
>
> Changes in v2:
>   Add halt polling support for idle instruction emulation, using api
> kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.
>
> ---
>
> Bibo Mao (3):
>   LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
>   LoongArch: KVM: Allow to access HW timer CSR registers always
>   LoongArch: KVM: Remove kvm_acquire_timer before entering guest
>
>  arch/loongarch/include/asm/kvm_vcpu.h |  1 -
>  arch/loongarch/kvm/exit.c             | 13 ++------
>  arch/loongarch/kvm/main.c             |  1 -
>  arch/loongarch/kvm/timer.c            | 47 +++++++--------------------
>  arch/loongarch/kvm/vcpu.c             | 38 +++++-----------------
>  5 files changed, 22 insertions(+), 78 deletions(-)
>
>
> base-commit: 305230142ae0637213bf6e04f6d9f10bbcb74af8
> --
> 2.39.3
>
maobibo Nov. 14, 2023, 1:47 a.m. UTC | #2 
On 2023/11/13 下午10:36, Huacai Chen wrote:
> Hi, Bibo,
> 
> Does this series have some relationship with the commit
> "LoongArch:LSVZ: set timer offset at first time once" in our internal
> repo?

No, it is not relative with internal repo. This patch is only 
optimization for timer save and restore. The internal repo is to set 
timestamp offset for VM.

I will post another patch for timestamp offset setting.

Regards
Bibo,

> 
> Huacai
> 
> On Fri, Nov 10, 2023 at 5:07 PM Bibo Mao <maobibo@loongson.cn> wrote:
>>
>> This patches removes SW timer switch during vcpu block stage. VM uses HW
>> timer rather than SW PV timer on LoongArch system, it can check pending
>> HW timer interrupt status directly, rather than switch to SW timer and
>> check injected SW timer interrupt.
>>
>> When SW timer is not used in vcpu halt-polling mode, the relative
>> SW timer handling before entering guest can be removed also. Timer
>> emulation is simpler than before, SW timer emuation is only used in vcpu
>> thread context switch.
>>
>> ---
>>
>> Changes in v3:
>>    Add kvm_arch_vcpu_runnable checking before kvm_vcpu_halt.
>>
>> Changes in v2:
>>    Add halt polling support for idle instruction emulation, using api
>> kvm_vcpu_halt rather than kvm_vcpu_block in function kvm_emu_idle.
>>
>> ---
>>
>> Bibo Mao (3):
>>    LoongArch: KVM: Remove SW timer switch when vcpu is halt polling
>>    LoongArch: KVM: Allow to access HW timer CSR registers always
>>    LoongArch: KVM: Remove kvm_acquire_timer before entering guest
>>
>>   arch/loongarch/include/asm/kvm_vcpu.h |  1 -
>>   arch/loongarch/kvm/exit.c             | 13 ++------
>>   arch/loongarch/kvm/main.c             |  1 -
>>   arch/loongarch/kvm/timer.c            | 47 +++++++--------------------
>>   arch/loongarch/kvm/vcpu.c             | 38 +++++-----------------
>>   5 files changed, 22 insertions(+), 78 deletions(-)
>>
>>
>> base-commit: 305230142ae0637213bf6e04f6d9f10bbcb74af8
>> --
>> 2.39.3
>>