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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id f6-20020a05600c4e8600b003fefb94ccc9sm16579085wmq.11.2023.11.07.07.55.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 07:55:43 -0800 (PST) From: Corentin Labbe <clabbe@baylibre.com> To: davem@davemloft.net, heiko@sntech.de, herbert@gondor.apana.org.au, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, p.zabel@pengutronix.de, robh+dt@kernel.org, sboyd@kernel.org Cc: ricardo@pardini.net, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Corentin Labbe <clabbe@baylibre.com> Subject: [PATCH 0/6] crypto: rockchip: add support for rk3588/rk3568 Date: Tue, 7 Nov 2023 15:55:26 +0000 Message-Id: <20231107155532.3747113-1-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 07 Nov 2023 08:06:03 -0800 (PST) X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781921946688791453 X-GMAIL-MSGID: 1781921946688791453 |
Series |
crypto: rockchip: add support for rk3588/rk3568
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Message
Corentin LABBE
Nov. 7, 2023, 3:55 p.m. UTC
Hello This patch serie add support for the new crypto rockchip IP found on rk3568 and rk3588. It was tested with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y I would like to thanks all people which helped to test this driver Regards Corentin Labbe (6): dt-bindings: crypto: add support for rockchip,crypto-rk3588 MAINTAINERS: add new dt-binding doc to the right entry ARM64: dts: rk3588: add crypto node ARM64: dts: rk356x: add crypto node reset: rockchip: secure reset must be used by SCMI crypto: rockchip: add rk3588 driver .../crypto/rockchip,rk3588-crypto.yaml | 65 ++ MAINTAINERS | 1 + arch/arm64/boot/dts/rockchip/rk356x.dtsi | 12 + arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 + drivers/clk/rockchip/rst-rk3588.c | 42 - drivers/crypto/Kconfig | 29 + drivers/crypto/rockchip/Makefile | 5 + drivers/crypto/rockchip/rk2_crypto.c | 739 ++++++++++++++++++ drivers/crypto/rockchip/rk2_crypto.h | 246 ++++++ drivers/crypto/rockchip/rk2_crypto_ahash.c | 344 ++++++++ drivers/crypto/rockchip/rk2_crypto_skcipher.c | 576 ++++++++++++++ .../dt-bindings/reset/rockchip,rk3588-cru.h | 68 +- 12 files changed, 2063 insertions(+), 76 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml create mode 100644 drivers/crypto/rockchip/rk2_crypto.c create mode 100644 drivers/crypto/rockchip/rk2_crypto.h create mode 100644 drivers/crypto/rockchip/rk2_crypto_ahash.c create mode 100644 drivers/crypto/rockchip/rk2_crypto_skcipher.c
Comments
Am Dienstag, 7. November 2023, 16:55:30 CET schrieb Corentin Labbe: > Both RK3566 and RK3568 have a crypto IP handled by the rk3588 crypto driver so adds a > node for it. please follow other commits in the subject line, i.e.: "arm64: dts: rockchip: add rk356x crypto node" Thanks Heiko > > Tested-by: Ricardo Pardini <ricardo@pardini.net> > Signed-off-by: Corentin Labbe <clabbe@baylibre.com> > --- > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index 0964761e3ce9..c94a1b535c32 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -1070,6 +1070,18 @@ sdhci: mmc@fe310000 { > status = "disabled"; > }; > > + crypto: crypto@fe380000 { > + compatible = "rockchip,rk3568-crypto"; > + reg = <0x0 0xfe380000 0x0 0x2000>; > + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cru ACLK_CRYPTO_NS>, <&cru HCLK_CRYPTO_NS>, > + <&cru CLK_CRYPTO_NS_CORE>; > + clock-names = "aclk", "hclk", "core"; > + resets = <&cru SRST_CRYPTO_NS_CORE>; > + reset-names = "core"; > + status = "okay"; > + }; > + > i2s0_8ch: i2s@fe400000 { > compatible = "rockchip,rk3568-i2s-tdm"; > reg = <0x0 0xfe400000 0x0 0x1000>; >