Message ID | 20231106141845.102648-1-gabriel.fernandez@foss.st.com |
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Headers |
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[2620:137:e000::3:2]) by mx.google.com with ESMTPS id s5-20020a656905000000b00577f4d736bbsi7885396pgq.373.2023.11.06.06.24.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 06:24:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=cMiIKgJ5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id F30868039A02; Mon, 6 Nov 2023 06:24:06 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231277AbjKFOXj (ORCPT <rfc822;jaysivo@gmail.com> + 35 others); Mon, 6 Nov 2023 09:23:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229485AbjKFOXh (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 6 Nov 2023 09:23:37 -0500 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89EC8C6; Mon, 6 Nov 2023 06:23:34 -0800 (PST) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 3A6CcAIH011451; Mon, 6 Nov 2023 15:23:15 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=selector1; bh=6RvQCNT AbR4WG3MTp5KNgtlkKEXn2F/eV91u9BzdgVI=; b=cMiIKgJ53zl/C+cKmVZRoYc KXCPZNyoU5ro5mAjW9n2X8tjUjIRW4UO2lblErAx8KcMZuPCynBqogYV74+Xk+H3 zsRVu3tUr31sNsT4rGdxSzA59m0LmPWFgHmpN3vE+3OqJfONgxxIMglZ1vNoktrv 5qF8mUBcDzk1DaRMPFBvEgaK4SB4IXhQNQ+owfQeIPEj26g1pcFBRyZ1MinxCdI+ Xvcuduj2nSPlH63pHL60sZTNQ66SS7ciT/LDn2AVyPuXk+KvvDigV+8VmIsYzI/4 YCX/KnkIyQ15CaMF6fxTUPAQMFz13fbVCPsGSyuGyfV+Lx0aBe3eF7+rO6lJiOg= = Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3u5eq2fcxd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 15:23:15 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F35D510005C; Mon, 6 Nov 2023 15:23:14 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DABD9257A92; Mon, 6 Nov 2023 15:23:14 +0100 (CET) Received: from localhost (10.201.21.240) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 6 Nov 2023 15:23:14 +0100 From: <gabriel.fernandez@foss.st.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Gabriel Fernandez <gabriel.fernandez@foss.st.com> CC: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH 0/4] Introduce STM32MP257 clock driver Date: Mon, 6 Nov 2023 15:18:41 +0100 Message-ID: <20231106141845.102648-1-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.240] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Mon, 06 Nov 2023 06:24:07 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781824906107417231 X-GMAIL-MSGID: 1781824906107417231 |
Series | Introduce STM32MP257 clock driver | |
Message
Gabriel FERNANDEZ
Nov. 6, 2023, 2:18 p.m. UTC
From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
This patch-set introduces clock driver for STM32MP257 based on Arm Cortex-35.
It creates also a menuconfig for all STM32MP clock drivers.
Gabriel Fernandez (4):
dt-bindings: stm32: add clocks and reset binding for stm32mp25
platform
clk: stm32: introduce clocks for STM32MP257 platform
clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
arm64: dts: st: add rcc support in stm32mp251
.../bindings/clock/st,stm32mp25-rcc.yaml | 116 +
arch/arm64/boot/dts/st/stm32mp251.dtsi | 59 +-
drivers/clk/Kconfig | 10 +-
drivers/clk/Makefile | 1 -
drivers/clk/stm32/Kconfig | 35 +
drivers/clk/stm32/Makefile | 2 +
drivers/clk/{ => stm32}/clk-stm32mp1.c | 0
drivers/clk/stm32/clk-stm32mp25.c | 1003 ++++
drivers/clk/stm32/stm32mp25_rcc.h | 4977 +++++++++++++++++
include/dt-bindings/clock/stm32mp25-clks.h | 492 ++
include/dt-bindings/reset/stm32mp25-resets.h | 167 +
11 files changed, 6824 insertions(+), 38 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
create mode 100644 drivers/clk/stm32/Kconfig
rename drivers/clk/{ => stm32}/clk-stm32mp1.c (100%)
create mode 100644 drivers/clk/stm32/clk-stm32mp25.c
create mode 100644 drivers/clk/stm32/stm32mp25_rcc.h
create mode 100644 include/dt-bindings/clock/stm32mp25-clks.h
create mode 100644 include/dt-bindings/reset/stm32mp25-resets.h