Message ID | 20231106-topic-sm8650-upstream-tlmm-v3-0-0e179c368933@linaro.org |
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Mon, 06 Nov 2023 00:32:35 -0800 (PST) From: Neil Armstrong <neil.armstrong@linaro.org> Subject: [PATCH v3 0/3] pinctrl: qcom: Introduce Pinctrl/GPIO for SM8650 Date: Mon, 06 Nov 2023 09:32:29 +0100 Message-Id: <20231106-topic-sm8650-upstream-tlmm-v3-0-0e179c368933@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAJ2kSGUC/33NvQ6CMBiF4Vshna3pf8DJ+zAOlX5AE0pJWxsN4 d4txEEXxvcMz1lQhGAhoku1oADZRuunEvxUoXbQUw/YmtKIEcYpoQonP9sWR1crSfBzjimAdji NzmEBLXApoOO0QQWYA3T2teO3e+nBxuTDe//KdFu/LJNHbKaYFJubWmiuhXpcRzvp4M8+9GhzM /uxODm0WLEaI4zgtRKSmT9rXdcPrS9iqhEBAAA= To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong <neil.armstrong@linaro.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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Series |
pinctrl: qcom: Introduce Pinctrl/GPIO for SM8650
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Message
Neil Armstrong
Nov. 6, 2023, 8:32 a.m. UTC
The SM8650 Top Level Mode Multiplexer supports 211 GPIOs,
and the usual UFS Reset, SDC Clk/Cmd/Data special pins.
An handful of pins can have their IRQ generated by the PDC
module, and for this support for the new wakeup_present &
wakeup_enable_bit is required to allow the "wakeup" event
to be passed to PDC and generate an interrupt or a wakeup
system event.
As SM8550, it also supports the i2c_pull_bit bit to enable the
on-SoC load resistor for I2C busses.
Dependencies: None
For convenience, a regularly refreshed linux-next based git tree containing
all the SM8650 related work is available at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Changes in v3:
- Correctly squashed intr_wakeup_ change protection with the spinlock
- Collected bindings reviewed-by
- Link to v2: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-tlmm-v2-0-9d4d4386452d@linaro.org
Changes in v2:
- Collect reviewed-bys
- Fixed unevaluatedProperties handling, and dropped the true properties
- Link to v1: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-tlmm-v1-0-4e3d84a3a46b@linaro.org
---
Neil Armstrong (3):
dt-bindings: pinctrl: document the SM8650 Top Level Mode Multiplexer
pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits
pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driver
.../bindings/pinctrl/qcom,sm8650-tlmm.yaml | 147 ++
drivers/pinctrl/qcom/Kconfig.msm | 8 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-msm.c | 42 +
drivers/pinctrl/qcom/pinctrl-msm.h | 5 +
drivers/pinctrl/qcom/pinctrl-sm8650.c | 1762 ++++++++++++++++++++
6 files changed, 1965 insertions(+)
---
base-commit: ed75ce58b3a55d2cd95b68a06fdb010e1e18d825
change-id: 20231016-topic-sm8650-upstream-tlmm-4ece354ef319
Best regards,
Comments
On Mon, Nov 6, 2023 at 9:32 AM Neil Armstrong <neil.armstrong@linaro.org> wrote: > The SM8650 Top Level Mode Multiplexer supports 211 GPIOs, > and the usual UFS Reset, SDC Clk/Cmd/Data special pins. > > An handful of pins can have their IRQ generated by the PDC > module, and for this support for the new wakeup_present & > wakeup_enable_bit is required to allow the "wakeup" event > to be passed to PDC and generate an interrupt or a wakeup > system event. > > As SM8550, it also supports the i2c_pull_bit bit to enable the > on-SoC load resistor for I2C busses. > > Dependencies: None > > For convenience, a regularly refreshed linux-next based git tree containing > all the SM8650 related work is available at: > https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patches applied, unless Bjorn has some last minutes regrets, they are in. Had to rebase the last patch manually because of Krzysztof's LPASS driver, check the result pls. Yours, Linus Walleij
Hi Linus, On 13/11/2023 15:06, Linus Walleij wrote: > On Mon, Nov 6, 2023 at 9:32 AM Neil Armstrong <neil.armstrong@linaro.org> wrote: > >> The SM8650 Top Level Mode Multiplexer supports 211 GPIOs, >> and the usual UFS Reset, SDC Clk/Cmd/Data special pins. >> >> An handful of pins can have their IRQ generated by the PDC >> module, and for this support for the new wakeup_present & >> wakeup_enable_bit is required to allow the "wakeup" event >> to be passed to PDC and generate an interrupt or a wakeup >> system event. >> >> As SM8550, it also supports the i2c_pull_bit bit to enable the >> on-SoC load resistor for I2C busses. >> >> Dependencies: None >> >> For convenience, a regularly refreshed linux-next based git tree containing >> all the SM8650 related work is available at: >> https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ >> >> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > > Patches applied, unless Bjorn has some last minutes regrets, > they are in. > > Had to rebase the last patch manually because of Krzysztof's > LPASS driver, check the result pls. Will check, thanks. Neil > > Yours, > Linus Walleij