Message ID | 20231030-topic-sm8650-upstream-tlmm-v2-0-9d4d4386452d@linaro.org |
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Mon, 30 Oct 2023 02:50:16 -0700 (PDT) From: Neil Armstrong <neil.armstrong@linaro.org> Subject: [PATCH v2 0/4] pinctrl: qcom: Introduce Pinctrl/GPIO for SM8650 Date: Mon, 30 Oct 2023 10:50:12 +0100 Message-Id: <20231030-topic-sm8650-upstream-tlmm-v2-0-9d4d4386452d@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAFR8P2UC/33Nyw6CMBCF4Vchs7amNwi68j0MiwoDTEIpmVaiI by7lbh2+Z/FdzaIyIQRrsUGjCtFCnMOfSqgHd08oKAuN2ipjZKqEiks1Iro66qU4rnExOi8SJP 3wmKLprTYG3WBDCyMPb0O/N7kHimmwO/ja1Xf9cfq8h+7KiGzbbraOuNs9bhNNDsO58ADNPu+f wBokGQKxQAAAA== To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong <neil.armstrong@linaro.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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Series |
pinctrl: qcom: Introduce Pinctrl/GPIO for SM8650
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Message
Neil Armstrong
Oct. 30, 2023, 9:50 a.m. UTC
The SM8650 Top Level Mode Multiplexer supports 211 GPIOs,
and the usual UFS Reset, SDC Clk/Cmd/Data special pins.
An handful of pins can have their IRQ generated by the PDC
module, and for this support for the new wakeup_present &
wakeup_enable_bit is required to allow the "wakeup" event
to be passed to PDC and generate an interrupt or a wakeup
system event.
As SM8550, it also supports the i2c_pull_bit bit to enable the
on-SoC load resistor for I2C busses.
Dependencies: None
For convenience, a regularly refreshed linux-next based git tree containing
all the SM8650 related work is available at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Changes in v2:
- Collect reviewed-bys
- Fixed unevaluatedProperties handling, and dropped the true properties
- Link to v1: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-tlmm-v1-0-4e3d84a3a46b@linaro.org
---
Neil Armstrong (4):
dt-bindings: pinctrl: document the SM8650 Top Level Mode Multiplexer
pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits
pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driver
fixup! pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits
.../bindings/pinctrl/qcom,sm8650-tlmm.yaml | 147 ++
drivers/pinctrl/qcom/Kconfig.msm | 8 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-msm.c | 42 +
drivers/pinctrl/qcom/pinctrl-msm.h | 5 +
drivers/pinctrl/qcom/pinctrl-sm8650.c | 1762 ++++++++++++++++++++
6 files changed, 1965 insertions(+)
---
base-commit: ed75ce58b3a55d2cd95b68a06fdb010e1e18d825
change-id: 20231016-topic-sm8650-upstream-tlmm-4ece354ef319
Best regards,
Comments
Hi, On 30/10/2023 10:50, Neil Armstrong wrote: > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) Please ignore this patch, I forgot to sqash it.... Neil > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index 2489a9ac8455..207b41018580 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -1197,6 +1197,7 @@ static int msm_gpio_irq_reqres(struct irq_data *d) > struct gpio_chip *gc = irq_data_get_irq_chip_data(d); > struct msm_pinctrl *pctrl = gpiochip_get_data(gc); > const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq]; > + unsigned long flags; > int ret; > > if (!try_module_get(gc->owner)) > @@ -1233,11 +1234,15 @@ static int msm_gpio_irq_reqres(struct irq_data *d) > if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) { > u32 intr_cfg; > > + raw_spin_lock_irqsave(&pctrl->lock, flags); > + > intr_cfg = msm_readl_intr_cfg(pctrl, g); > if (intr_cfg & BIT(g->intr_wakeup_present_bit)) { > intr_cfg |= BIT(g->intr_wakeup_enable_bit); > msm_writel_intr_cfg(intr_cfg, pctrl, g); > } > + > + raw_spin_unlock_irqrestore(&pctrl->lock, flags); > } > > return 0; > @@ -1251,16 +1256,21 @@ static void msm_gpio_irq_relres(struct irq_data *d) > struct gpio_chip *gc = irq_data_get_irq_chip_data(d); > struct msm_pinctrl *pctrl = gpiochip_get_data(gc); > const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq]; > + unsigned long flags; > > /* Disable the wakeup_enable bit if it has been set in msm_gpio_irq_reqres() */ > if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) { > u32 intr_cfg; > > + raw_spin_lock_irqsave(&pctrl->lock, flags); > + > intr_cfg = msm_readl_intr_cfg(pctrl, g); > if (intr_cfg & BIT(g->intr_wakeup_present_bit)) { > intr_cfg &= ~BIT(g->intr_wakeup_enable_bit); > msm_writel_intr_cfg(intr_cfg, pctrl, g); > } > + > + raw_spin_unlock_irqrestore(&pctrl->lock, flags); > } > > gpiochip_unlock_as_irq(gc, d->hwirq); >
Hi, On 30/10/2023 10:50, Neil Armstrong wrote: > The SM8650 Top Level Mode Multiplexer supports 211 GPIOs, > and the usual UFS Reset, SDC Clk/Cmd/Data special pins. > > An handful of pins can have their IRQ generated by the PDC > module, and for this support for the new wakeup_present & > wakeup_enable_bit is required to allow the "wakeup" event > to be passed to PDC and generate an interrupt or a wakeup > system event. > > As SM8550, it also supports the i2c_pull_bit bit to enable the > on-SoC load resistor for I2C busses. > > Dependencies: None > > For convenience, a regularly refreshed linux-next based git tree containing > all the SM8650 related work is available at: > https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > Changes in v2: > - Collect reviewed-bys > - Fixed unevaluatedProperties handling, and dropped the true properties > - Link to v1: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-tlmm-v1-0-4e3d84a3a46b@linaro.org > > --- > Neil Armstrong (4): > dt-bindings: pinctrl: document the SM8650 Top Level Mode Multiplexer > pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits > pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driver > fixup! pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits Please ignore this patchset, I forgot to squash patch 4.... Neil > > .../bindings/pinctrl/qcom,sm8650-tlmm.yaml | 147 ++ > drivers/pinctrl/qcom/Kconfig.msm | 8 + > drivers/pinctrl/qcom/Makefile | 1 + > drivers/pinctrl/qcom/pinctrl-msm.c | 42 + > drivers/pinctrl/qcom/pinctrl-msm.h | 5 + > drivers/pinctrl/qcom/pinctrl-sm8650.c | 1762 ++++++++++++++++++++ > 6 files changed, 1965 insertions(+) > --- > base-commit: ed75ce58b3a55d2cd95b68a06fdb010e1e18d825 > change-id: 20231016-topic-sm8650-upstream-tlmm-4ece354ef319 > > Best regards,