mbox series

[v5,0/5] Add LVTS support for mt8192

Message ID 20231017190545.157282-1-bero@baylibre.com
Headers
Series Add LVTS support for mt8192 |

Message

Bernhard Rosenkränzer Oct. 17, 2023, 7:05 p.m. UTC 
  Add full LVTS support (MCU thermal domain + AP thermal domain) to MediaTek MT8192 SoC.
Also, add Suspend and Resume support to LVTS Driver (all SoCs),
and update the documentation that describes the Calibration Data Offsets.

v5 changes are a lot smaller than originally assumed -- commit
185673ca71d3f7e9c7d62ee5084348e084352e56 fixed the issue I
was originally planning to work around in this patchset,
so what remains for v5 is noirq and cosmetics.

Changelog:
   v5 :
        - Suspend/Resume in noirq stage
	- Reorder chipset specific functions
        - Rebased :
            base-commit: 4d5ab2376ec576af173e5eac3887ed0b51bd8566

   v4 :
        - Shrink the lvts_ap thermal sensor I/O range to 0xc00 to make
          room for SVS support, pointed out by
          AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

    v3 :
        - Rebased :
            base-commit: 6a3d37b4d885129561e1cef361216f00472f7d2e
        - Fix issues in v2 pointed out by Nícolas F. R. A. Prado <nfraprado@collabora.com>:
          Use filtered mode to make sure threshold interrupts are triggered,
          protocol documentation, cosmetics
        - I (bero@baylibre.com) will be taking care of this patchset
          from now on, since Balsam has left BayLibre. Thanks for
          getting it almost ready, Balsam!

    v2 :
        - Based on top of thermal/linux-next :
            base-commit: 7ac82227ee046f8234471de4c12a40b8c2d3ddcc
        - Squash "add thermal zones and thermal nodes" and
            "add temperature mitigation threshold" commits together to form
            "arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones" commit.
        - Add Suspend and Resume support to LVTS Driver.
        - Update Calibration Data documentation.
        - Fix calibration data offsets for mt8192
            (Thanks to "Chen-Yu Tsai" and "Nícolas F. R. A. Prado").
        https://lore.kernel.org/all/20230425133052.199767-1-bchihi@baylibre.com/
        Tested-by: Chen-Yu Tsai <wenst@chromium.org>

    v1 :
        - The initial series "Add LVTS support for mt8192" :
            "https://lore.kernel.org/all/20230307163413.143334-1-bchihi@baylibre.com/".

Balsam CHIHI (5):
  dt-bindings: thermal: mediatek: Add LVTS thermal controller definition
    for mt8192
  thermal/drivers/mediatek/lvts_thermal: Add suspend and resume
  thermal/drivers/mediatek/lvts_thermal: Add mt8192 support
  arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones
  thermal/drivers/mediatek/lvts_thermal: Update calibration data
    documentation

 arch/arm64/boot/dts/mediatek/mt8192.dtsi      | 454 ++++++++++++++++++
 drivers/thermal/mediatek/lvts_thermal.c       | 163 ++++++-
 .../thermal/mediatek,lvts-thermal.h           |  19 +
 3 files changed, 634 insertions(+), 2 deletions(-)

Comments

Chen-Yu Tsai Oct. 18, 2023, 12:07 a.m. UTC | #1 
Hi,

On Tue, Oct 17, 2023 at 12:05 PM Bernhard Rosenkränzer
<bero@baylibre.com> wrote:
>
> Add full LVTS support (MCU thermal domain + AP thermal domain) to MediaTek MT8192 SoC.
> Also, add Suspend and Resume support to LVTS Driver (all SoCs),
> and update the documentation that describes the Calibration Data Offsets.
>
> v5 changes are a lot smaller than originally assumed -- commit
> 185673ca71d3f7e9c7d62ee5084348e084352e56 fixed the issue I
> was originally planning to work around in this patchset,
> so what remains for v5 is noirq and cosmetics.

I see two series in my inbox and on the mailing list. Which one is the
correct one?

Thanks
ChenYu

> Changelog:
>    v5 :
>         - Suspend/Resume in noirq stage
>         - Reorder chipset specific functions
>         - Rebased :
>             base-commit: 4d5ab2376ec576af173e5eac3887ed0b51bd8566
>
>    v4 :
>         - Shrink the lvts_ap thermal sensor I/O range to 0xc00 to make
>           room for SVS support, pointed out by
>           AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>
>     v3 :
>         - Rebased :
>             base-commit: 6a3d37b4d885129561e1cef361216f00472f7d2e
>         - Fix issues in v2 pointed out by Nícolas F. R. A. Prado <nfraprado@collabora.com>:
>           Use filtered mode to make sure threshold interrupts are triggered,
>           protocol documentation, cosmetics
>         - I (bero@baylibre.com) will be taking care of this patchset
>           from now on, since Balsam has left BayLibre. Thanks for
>           getting it almost ready, Balsam!
>
>     v2 :
>         - Based on top of thermal/linux-next :
>             base-commit: 7ac82227ee046f8234471de4c12a40b8c2d3ddcc
>         - Squash "add thermal zones and thermal nodes" and
>             "add temperature mitigation threshold" commits together to form
>             "arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones" commit.
>         - Add Suspend and Resume support to LVTS Driver.
>         - Update Calibration Data documentation.
>         - Fix calibration data offsets for mt8192
>             (Thanks to "Chen-Yu Tsai" and "Nícolas F. R. A. Prado").
>         https://lore.kernel.org/all/20230425133052.199767-1-bchihi@baylibre.com/
>         Tested-by: Chen-Yu Tsai <wenst@chromium.org>
>
>     v1 :
>         - The initial series "Add LVTS support for mt8192" :
>             "https://lore.kernel.org/all/20230307163413.143334-1-bchihi@baylibre.com/".
>
> Balsam CHIHI (5):
>   dt-bindings: thermal: mediatek: Add LVTS thermal controller definition
>     for mt8192
>   thermal/drivers/mediatek/lvts_thermal: Add suspend and resume
>   thermal/drivers/mediatek/lvts_thermal: Add mt8192 support
>   arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones
>   thermal/drivers/mediatek/lvts_thermal: Update calibration data
>     documentation
>
>  arch/arm64/boot/dts/mediatek/mt8192.dtsi      | 454 ++++++++++++++++++
>  drivers/thermal/mediatek/lvts_thermal.c       | 163 ++++++-
>  .../thermal/mediatek,lvts-thermal.h           |  19 +
>  3 files changed, 634 insertions(+), 2 deletions(-)
>
> --
> 2.42.0
Bernhard Rosenkränzer Oct. 18, 2023, 9:57 a.m. UTC | #2 
Hi,

On Wed, 18 Oct 2023 at 02:07, Chen-Yu Tsai <wenst@chromium.org> wrote:
>
> I see two series in my inbox and on the mailing list. Which one is the
> correct one?

They're identical except I accidentally sent them out using my private
email (that happens to be on a mail server hosted on my DSL line, so a
number of MLs drop it because of dialup blacklists) first. I resent it
using my work email when the error messages about that started
flooding my inbox. Sorry about the confusion - but code wise it
doesn't matter, v5 is v5.

ttyl
bero
Daniel Lezcano Oct. 19, 2023, 12:44 a.m. UTC | #3 
On 17/10/2023 21:05, Bernhard Rosenkränzer wrote:
> Add full LVTS support (MCU thermal domain + AP thermal domain) to MediaTek MT8192 SoC.
> Also, add Suspend and Resume support to LVTS Driver (all SoCs),
> and update the documentation that describes the Calibration Data Offsets.

Applied patches 1,2,3 and 5, letting the patch 4 to go through the 
Mediatek tree

Thanks

   -- Daniel