From patchwork Tue Oct 10 12:30:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yicong Yang X-Patchwork-Id: 15157 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp162734vqb; Tue, 10 Oct 2023 05:33:50 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE2NivgDODsVr28Vk+X1p4HqOBOWNfDJCL9p9xQhBBe/ZsilB5GBpP6Iq3JWlDVV9m/RTzM X-Received: by 2002:a05:6a00:3a1e:b0:68a:52ec:3d36 with SMTP id fj30-20020a056a003a1e00b0068a52ec3d36mr17415253pfb.31.1696941230241; Tue, 10 Oct 2023 05:33:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696941230; cv=none; d=google.com; s=arc-20160816; b=CucTi55LdfocRmkn0IWa63TCQZm8tPUjG0CZczOOX5wqJGS5uHVN7m2JzMmIJC4JvT Nf/X+2JAzX7jBmD0JZYWs6p+FPYXOdFM9sza58KqC84sVN5lKoBDZjqcK4Iro8KDdM7U 70pfN/AniuMmDAgfhuBTX728pAXpuWVRoyvdSMUGHD1Y6b6oHZ6a8wD7veLCz/Jro3Fa gKgY8xVJrO+htgvqg4CflrskgcFCpLQs52zfp5tVWKrMRO/aT2B2gSJkZq5Mx4kyBoco 0nalIPAGrVSgRO2S+6Ek1h2cChepWKaht+lIYiQJZCBV4A1ONyj4KLgnEI2XLdNwIen8 ZbOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=IK92qfAi1+1bJp2b4jwip3ZaR/uG8ijCZL2pfCNcLoA=; fh=8Ol9km2NKn2Rn3Mriqm9O8G9ZvsYmwWidDIgbBZEFNI=; b=xCfNdQ1evddSUF62pkdq75CjdGnckUNYNopBbI5ZsotuqVeDk8LK4+4UfA5zdad8DO roqA3ouDe79s8yLNRbF2hwr8gFGSb1Y5CnfLK1uwQFt3x3nDnZH25bdhGHEkdKhpxPRP VlGiWxPO69urYn3UjyTEukDoB/O3xZSixt1XKtS9clnGR5z32SJZl8faRpBvAtMaQqsO C5HSncRY89z6x1yyVR5lO1hYziK1dQUzX9I2b8ArT5KyU0quzpHVhI94YVJX14sZ3YXK xRI9XBBvwHJg5yDBdRXfqZ6tMip40B5s+2/I4P1+Wi9tGRlnLswvZl+oPAYlwAsJnIc5 Defg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=huawei.com Received: from pete.vger.email (pete.vger.email. [2620:137:e000::3:6]) by mx.google.com with ESMTPS id s27-20020a63925b000000b00573fc592e9dsi8609490pgn.848.2023.10.10.05.33.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Oct 2023 05:33:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) client-ip=2620:137:e000::3:6; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:6 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=huawei.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id DBF40801BE66; Tue, 10 Oct 2023 05:33:47 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231731AbjJJMd1 (ORCPT + 20 others); Tue, 10 Oct 2023 08:33:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231480AbjJJMdZ (ORCPT ); Tue, 10 Oct 2023 08:33:25 -0400 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C443DB4 for ; Tue, 10 Oct 2023 05:33:23 -0700 (PDT) Received: from canpemm500009.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4S4Zwd3MMszVlR7; Tue, 10 Oct 2023 20:29:53 +0800 (CST) Received: from localhost.localdomain (10.50.163.32) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 10 Oct 2023 20:33:21 +0800 From: Yicong Yang To: , , , CC: , , , , , , , , Subject: [RFC PATCH 0/3] Add HiSilicon system timer driver Date: Tue, 10 Oct 2023 20:30:30 +0800 Message-ID: <20231010123033.23258-1-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 X-Originating-IP: [10.50.163.32] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected X-Spam-Status: No, score=2.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Tue, 10 Oct 2023 05:33:47 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779371847505764055 X-GMAIL-MSGID: 1779371847505764055 From: Yicong Yang HiSilicon system timer is a memory mapped platform timer compatible with the arm's generic timer specification. The timer supports both SPI and LPI interrupt and can be enumerated through ACPI DSDT table. Since the timer is fully compatible with the spec, it can reuse most codes of the arm_arch_timer driver. However since the arm_arch_timer driver only supports GTDT and SPI interrupt, this series support the HiSilicon system timer by: - refactor some of the arm_arch_timer codes and export the function to register a arch memory timer by other drivers - retrieve the IO memory and interrupt resource through DSDT in a separate driver, then setup and register the clockevent device reuse the arm_arch_timer function Using LPI for the timer is mentioned in BSA Spec section 3.8.1 (DEN0094C 1.0C). Yicong Yang (3): clocksource/drivers/arm_arch_timer: Split the function of __arch_timer_setup() clocksource/drivers/arm_arch_timer: Extend and export arch_timer_mem_register() clocksource/drivers: Add HiSilicon system timer driver drivers/clocksource/Kconfig | 10 +++ drivers/clocksource/Makefile | 1 + drivers/clocksource/arm_arch_timer.c | 123 +++++++++++++++------------ drivers/clocksource/timer-hisi-sys.c | 68 +++++++++++++++ include/clocksource/arm_arch_timer.h | 2 + 5 files changed, 148 insertions(+), 56 deletions(-) create mode 100644 drivers/clocksource/timer-hisi-sys.c