mbox series

[0/2] arm64/fp: Remove vector length pseudo registers

Message ID 20230913-arm64-vec-len-cpufeature-v1-0-cc69b0600a8a@kernel.org
Headers
Series arm64/fp: Remove vector length pseudo registers |

Message

Mark Brown Sept. 13, 2023, 2:48 p.m. UTC 
  Since the pseudo registers used by the cpufeature code for the maximum
SVE and SME vector length appear to be unneeded other than as a double
check of the full vector length enumeration.  As discussed when fixing
warnings from the pseudo register code let's simplify things by just
removing those registers and relying entirely on the full enumeration.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
Mark Brown (2):
      arm64/sve: Remove ZCR pseudo register from cpufeature code
      arm64/sve: Remove SMCR pseudo register from cpufeature code

 arch/arm64/include/asm/cpu.h    |  6 ----
 arch/arm64/include/asm/fpsimd.h |  1 -
 arch/arm64/kernel/cpufeature.c  | 58 ++++++-------------------------
 arch/arm64/kernel/fpsimd.c      | 75 +++++------------------------------------
 4 files changed, 19 insertions(+), 121 deletions(-)
---
base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d
change-id: 20230912-arm64-vec-len-cpufeature-290d78e90422

Best regards,

Comments

Catalin Marinas Sept. 25, 2023, 5:10 p.m. UTC | #1 
On Wed, 13 Sep 2023 15:48:11 +0100, Mark Brown wrote:
> Since the pseudo registers used by the cpufeature code for the maximum
> SVE and SME vector length appear to be unneeded other than as a double
> check of the full vector length enumeration.  As discussed when fixing
> warnings from the pseudo register code let's simplify things by just
> removing those registers and relying entirely on the full enumeration.
> 
> 
> [...]

Applied to arm64 (for-next/sve-remove-pseudo-regs), thanks!

[1/2] arm64/sve: Remove ZCR pseudo register from cpufeature code
      https://git.kernel.org/arm64/c/abef0695f966
[2/2] arm64/sve: Remove SMCR pseudo register from cpufeature code
      https://git.kernel.org/arm64/c/391208485c3a