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SCS uses compiler instrumentation to store return addresses in a separate shadow stack to protect them against accidental or malicious overwrites. More information about SCS can be found here: https://clang.llvm.org/docs/ShadowCallStack.html Patch 1 is from Deepak, and it simplifies VMAP_STACK overflow handling by adding support for accessing per-CPU variables directly in assembly. The patch is included in this series to make IRQ stack switching cleaner with SCS, and I've simply rebased it. Patch 2 uses this functionality to clean up the stack switching by moving duplicate code into a single function. On RISC-V, the compiler uses the gp register for storing the current shadow call stack pointer, which is incompatible with global pointer relaxation. Patch 3 moves global pointer loading into a macro that can be easily disabled with SCS. Patch 4 implements SCS register loading and switching, and allows the feature to be enabled, and patch 5 adds separate per-CPU IRQ shadow call stacks when CONFIG_IRQ_STACKS is enabled. Note that this series requires Clang 17. Earlier Clang versions support SCS on RISC-V, but use the x18 register instead of gp, which isn't ideal. gcc has SCS support for arm64, but I'm not aware of plans to support RISC-V. Once the Zicfiss extension is ratified, it's probably preferable to use hardware-backed shadow stacks instead of SCS on hardware that supports the extension, and we may want to consider implementing CONFIG_DYNAMIC_SCS to patch between the implementation at runtime (similarly to the arm64 implementation, which switches to SCS when hardware PAC support isn't available). Sami Deepak Gupta (1): riscv: VMAP_STACK overflow detection thread-safe Sami Tolvanen (4): riscv: Deduplicate IRQ stack switching riscv: Move global pointer loading to a macro riscv: Implement Shadow Call Stack riscv: Use separate IRQ shadow call stacks arch/riscv/Kconfig | 6 ++ arch/riscv/Makefile | 4 + arch/riscv/include/asm/asm.h | 35 ++++++++ arch/riscv/include/asm/irq_stack.h | 3 + arch/riscv/include/asm/scs.h | 54 ++++++++++++ arch/riscv/include/asm/thread_info.h | 16 +++- arch/riscv/kernel/asm-offsets.c | 4 + arch/riscv/kernel/entry.S | 126 +++++++++++++-------------- arch/riscv/kernel/head.S | 19 ++-- arch/riscv/kernel/irq.c | 53 ++++++----- arch/riscv/kernel/suspend_entry.S | 5 +- arch/riscv/kernel/traps.c | 65 ++------------ arch/riscv/kernel/vdso/Makefile | 2 +- arch/riscv/purgatory/Makefile | 4 + 14 files changed, 228 insertions(+), 168 deletions(-) create mode 100644 arch/riscv/include/asm/scs.h base-commit: 52a93d39b17dc7eb98b6aa3edb93943248e03b2f