mbox series

[0/3] add clock controller of qca8386/qca8084

Message ID 20230801085352.22873-1-quic_luoj@quicinc.com
Headers
Series add clock controller of qca8386/qca8084 |

Message

Jie Luo Aug. 1, 2023, 8:53 a.m. UTC 
  From: Jie Luo <quic_luoj@quicinc.com>

qca8xxx is 4 * 2.5GBaseT ports chip, working as switch mode
named by qca8386, working as PHY mode named by qca8084,
clock hardware reigster is accessed by MDIO bus.

This patch series add the clock controller of qca8363/qca8084,
and add the clock flag CLK_ENABLE_MUTEX_LOCK to avoid spin lock
used during the clock operation of qca8k clock controller where
the sleep happens when accessing clock control register by MDIO
bus.

Luo Jie (3):
  clk: Add the flag CLK_ENABLE_MUTEX_LOCK of enabling clock
  dt-bindings: clock: add qca8386/qca8084 clock and reset definitions
  clk: qcom: add clock controller driver for qca8386/qca8084

 .../bindings/clock/qcom,nsscc-qca8k.yaml      |   59 +
 drivers/clk/clk.c                             |   78 +-
 drivers/clk/qcom/Kconfig                      |    8 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/nsscc-qca8k.c                | 2205 +++++++++++++++++
 include/dt-bindings/clock/qcom,nsscc-qca8k.h  |  102 +
 include/dt-bindings/reset/qcom,nsscc-qca8k.h  |   76 +
 include/linux/clk-provider.h                  |    4 +
 8 files changed, 2519 insertions(+), 14 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.yaml
 create mode 100644 drivers/clk/qcom/nsscc-qca8k.c
 create mode 100644 include/dt-bindings/clock/qcom,nsscc-qca8k.h
 create mode 100644 include/dt-bindings/reset/qcom,nsscc-qca8k.h


base-commit: ec89391563792edd11d138a853901bce76d11f44

Comments

Rob Herring Aug. 1, 2023, 9:36 a.m. UTC | #1 
On Tue, 01 Aug 2023 16:53:51 +0800, Luo Jie wrote:
> QCA8386/QCA8084 includes the clock & reset controller that is
> accessed by MDIO bus. Two work modes are supported, qca8386 works
> as switch mode, qca8084 works as PHY mode.
> 
> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
> ---
>  .../bindings/clock/qcom,nsscc-qca8k.yaml      |  59 ++++++++++
>  include/dt-bindings/clock/qcom,nsscc-qca8k.h  | 102 ++++++++++++++++++
>  include/dt-bindings/reset/qcom,nsscc-qca8k.h  |  76 +++++++++++++
>  3 files changed, 237 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.yaml
>  create mode 100644 include/dt-bindings/clock/qcom,nsscc-qca8k.h
>  create mode 100644 include/dt-bindings/reset/qcom,nsscc-qca8k.h
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dts:22.11-22: Warning (reg_format): /example-0/clock-controller@24:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: clock-controller@24: '#power-domain-cells' is a required property
	from schema $id: http://devicetree.org/schemas/clock/qcom,nsscc-qca8k.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.example.dtb: clock-controller@24: Unevaluated properties are not allowed ('#clock-cells', '#reset-cells' were unexpected)
	from schema $id: http://devicetree.org/schemas/clock/qcom,nsscc-qca8k.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230801085352.22873-3-quic_luoj@quicinc.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.