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[83.9.30.53]) by smtp.gmail.com with ESMTPSA id p13-20020a05651238cd00b004fdc7ec5cbesm2016936lft.300.2023.07.31.03.52.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 03:52:26 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH v2 00/10] Fix up icc clock rate calculation on some platforms Date: Mon, 31 Jul 2023 12:52:16 +0200 Message-Id: <20230726-topic-icc_coeff-v2-0-8c91c6c76076@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAGCSx2QC/3WN0QqDIBRAfyXu8xxqy9We9h8jhprWhdC4ttgI/ 32u9z2eA4ezQ3KELsGt2oHchgljKCBPFdhJh9ExHAqD5LLmV6nYGhe0DK192ui8Z4Y39dBceGc 6D6UyOjlmSAc7lS685rnIhZzH97F59IUnTGukz3HdxM/+H2yCcVYLJVSneCtae58xaIrnSCP0O ecvX3hDisQAAAA= To: Andy Gross , Bjorn Andersson , Georgi Djakov , Michael Turquette , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1690800744; l=2187; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=MEmn4TdMUY6cSwKTGP5pVayS+gxapd+/H71puYX2uDk=; b=ppBEsnQzWYp0eimMdNSsp7hopNJK1hTAlo24R0kur3MbFhPwsMLKVdOCStEvXTt7mmha79K3p n50T1nTeLiQAo/g6tMPtQmeYVr/6KWSe+euAXXKTodreeoKmDJ5GJcV X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772938297963633496 X-GMAIL-MSGID: 1772938297963633496 Certain platforms require that some buses (or individual nodes) make some additional changes to the clock rate formula, throwing in some magic, Qualcomm-defined coefficients, to account for "inefficiencies". Add the framework for it and utilize it on a couple SoCs. Signed-off-by: Konrad Dybcio --- Changes in v2: - Use the (arguably less favourable but necessary for precission) 100/x instead of x/100 for ib coefficient, update values in consequent patches to reflect that - Rename "_percent" to "_coeff" because of /\ - Add the necessary code to support per-node clocks - Add the necessary code to support per-node coefficients - Hook up the CPUSS<->GNoC clock on QCM2290 - Update EBI node on QCM2290 - Link to v1: https://lore.kernel.org/r/20230726-topic-icc_coeff-v1-0-31616960818c@linaro.org --- Konrad Dybcio (10): interconnect: qcom: icc-rpm: Add AB/IB calculations coefficients interconnect: qcom: icc-rpm: Separate out clock rate calulcations interconnect: qcom: icc-rpm: Let nodes drive their own bus clock interconnect: qcom: icc-rpm: Check for node-specific rate coefficients interconnect: qcom: qcm2290: Hook up MAS_APPS_PROC's bus clock interconnect: qcom: qcm2290: Set AB coefficients interconnect: qcom: qcm2290: Update EBI channel configuration interconnect: qcom: sdm660: Set AB/IB coefficients interconnect: qcom: msm8996: Set AB/IB coefficients clk: qcom: smd-rpm: Move CPUSS_GNoC clock to interconnect drivers/clk/qcom/clk-smd-rpm.c | 16 ++++-- drivers/interconnect/qcom/icc-rpm-clocks.c | 6 ++ drivers/interconnect/qcom/icc-rpm.c | 92 ++++++++++++++++++++++++------ drivers/interconnect/qcom/icc-rpm.h | 15 +++++ drivers/interconnect/qcom/msm8996.c | 8 ++- drivers/interconnect/qcom/qcm2290.c | 9 ++- drivers/interconnect/qcom/sdm660.c | 4 ++ 7 files changed, 124 insertions(+), 26 deletions(-) --- base-commit: ec89391563792edd11d138a853901bce76d11f44 change-id: 20230726-topic-icc_coeff-b053d5409b9f Best regards,