Message ID | 20230708-topic-rpmh_icc_rsc-v1-0-b223bd2ac8dd@linaro.org |
---|---|
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a6b2:0:b0:3e4:2afc:c1 with SMTP id c18csp439635vqm; Tue, 11 Jul 2023 05:29:46 -0700 (PDT) X-Google-Smtp-Source: APBJJlENftk15j2t7BjJrMhv9eSYFTJtJm/X6Enlm1z2lhVDel6pKD2kyLjzCCOW+/ubT1/Eent7 X-Received: by 2002:a17:902:8ec3:b0:1b7:e646:4cc4 with SMTP id x3-20020a1709028ec300b001b7e6464cc4mr13060828plo.28.1689078585543; Tue, 11 Jul 2023 05:29:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689078585; cv=none; d=google.com; s=arc-20160816; b=g5yuEk0jcg+jVw6bFV+SnVH0uB9OqoQ5UOTDI1CQ9FYNreMX5+ByTupEYHfDs/NUO1 jtYL9Li/Hpk+MkQz25+CBCS1zZ1Rpz8bx7m15OJGOceKP+FJH32fto2gzqdThiMtJ1uF wdXOKBMOHKwQexQlBqq1B9bi2Bcj6T0rPDOAWcXqs+bb2YCdAgEMp3BI2xVSdZnjU7qs 4NrFgdvuhXEIXiFF7qU4afNWVlAVn364YFI3g8RxIxFSsyT/cGRo5fIkxGv93jKGPSpO N+nMg/i+Cc9BEt2I+tk3Fgjyc1vSLjDi7LVUnvsjCT/2GMr/2OlZcKZ6Gdsa29z58HsL /PLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:content-transfer-encoding:mime-version :message-id:date:subject:from:dkim-signature; bh=ge+hjy1ytS3fWV6a0cnAiNI+XNr+wbfujfaDkKlcW1Y=; fh=JoAcrgft0uy82XIp94lSiB7rWiE0KfkQABjXnED6+RA=; b=c4PFNpB9I8XaPki+Yn0Ywfr9rdQniOGHMQq1ekbzOMwDPLdznz5USt3u9aqOngnN/Z RXdi++53STrxoCYkuA5c4fJBWCtdCAzeWRrrgAXXAlUhMVYIpKHNk++2hTsFIueO+uYa Y3sGeUzCIg+xFKbT+gXRFvAalh/7pLReZ1sg0gQblFn/KJFi7fqjZ/DchfkkZsG0C9vZ i0LE0OArNfUI10JU0rHAUJmTWj9y7apOQ0A9TrVU64ArI+K1xl7piEWxArPpnxN4ohEk c+k4JakznUCJZqke/CzwpjzShjwKDNHCxBNwCq+4xvGeA53sZ6U8gC6es+sXXqGFgYep G1wQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="lKGVu4/l"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e2-20020a17090301c200b001b9e2ce5723si1581320plh.495.2023.07.11.05.29.31; Tue, 11 Jul 2023 05:29:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="lKGVu4/l"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231721AbjGKMSi (ORCPT <rfc822;ybw1215001957@gmail.com> + 99 others); Tue, 11 Jul 2023 08:18:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231608AbjGKMSb (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 11 Jul 2023 08:18:31 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C723E69 for <linux-kernel@vger.kernel.org>; Tue, 11 Jul 2023 05:18:27 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2b6fdaf6eefso87498911fa.0 for <linux-kernel@vger.kernel.org>; Tue, 11 Jul 2023 05:18:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689077906; x=1691669906; h=cc:to:content-transfer-encoding:mime-version:message-id:date :subject:from:from:to:cc:subject:date:message-id:reply-to; bh=ge+hjy1ytS3fWV6a0cnAiNI+XNr+wbfujfaDkKlcW1Y=; b=lKGVu4/leGvJTRgUrgFiHw0Xqd08JRXEdUBnLtOufAfgIMn7SPWxrOrNBNKMfsnioR +MTqd/mpBGAIF8ftjonFVh6XzyRm4JZnsDpB1wdipbSk7+CIebXTmGqYjpjjZxvsRYLt yxJ0p1hbGvul44m3GWLQa1GneolSJjYOBOTfyi95zHULpH5LT0nigldAQt9JLneMbyQA eR3S8QkcpjM0lTn9PeBUtdQp4ZuvdYQ8tp3v0hWk2MwtpaukiKA+SZjb+Ejh106ZAkpk 8PNE7V3N1x0jSEGQ/GQiCPIYqOabGFccMavoeQzbhokUqH3eTEsA/bjgROlyiv6WhlHc 8crw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689077906; x=1691669906; h=cc:to:content-transfer-encoding:mime-version:message-id:date :subject:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ge+hjy1ytS3fWV6a0cnAiNI+XNr+wbfujfaDkKlcW1Y=; b=Dh1tCLBLQAfvkwm152aNSAd0YuiOOp91x+xFnibcOFObAW/DTck0n+/M0E6rNJkhWG /W4uFKQOKHUBC7hHj6W0PvuIWlUrvkUJE7XttHfr4SdBCKXxZsU8jmoThSFF6yRTWevA 7ysC/WVnIf7lr+AbNoEa5K4BN8cGEkG0s+aDMbMN01ImpLkDGmPM5soh7EALeJAYFHyz pbwaC1SZNp46Ja2p3OLUUx8E5SRUm8OkX7LmJic7oIiXT7EGo3Dmq//t2ur2L1iqLPRq IWigiwScXvjNcd87xoefemqH60etMC2f5iC6qrlQTORG/HkQ2gcjourpa9SUb8oiEDBr sV1w== X-Gm-Message-State: ABy/qLYjpyjhU0lJtqrwwSozFpztvvMa++kcrn/+lVNzLBgNTWV8HKnt 5z5XlNsGY2X82npJO2nQqqjdig== X-Received: by 2002:a2e:9216:0:b0:2b6:ec2b:659 with SMTP id k22-20020a2e9216000000b002b6ec2b0659mr12236809ljg.17.1689077905830; Tue, 11 Jul 2023 05:18:25 -0700 (PDT) Received: from [192.168.1.101] (abyl96.neoplus.adsl.tpnet.pl. [83.9.31.96]) by smtp.gmail.com with ESMTPSA id d18-20020a2e96d2000000b002b708450951sm435563ljj.88.2023.07.11.05.18.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 05:18:25 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH 00/53] icc-rpmh multi-RSC voting groundwork Date: Tue, 11 Jul 2023 14:17:59 +0200 Message-Id: <20230708-topic-rpmh_icc_rsc-v1-0-b223bd2ac8dd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAHhIrWQC/x2N0QrCMAxFf2Xk2UKsD5v+ishoY2oDsyuJijD27 wYfz7kc7gbGKmxwGTZQ/ojJ2hyOhwGopvbgIHdniBhPOOIUXmsXCtqfdRaiWY1Cmc6+YMkRR/A wJ+OQNTWqnrb3srjsykW+/6frbd9/lcHIh3kAAAA= To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Georgi Djakov <djakov@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1689077904; l=7841; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Rei3R9n4uCU+u2iJ+J2m+Ko7NiZGPGkR7HWezlPw+hQ=; b=VpWSByJM2AvVTsGuUMxF9PX3d/YlFvF7k1f2BwyYhtmvirx+8MZ+C9lRN6l1gsja9k7POci2c LmuuJeAnqvnBq/QHVgrI4jt5neFMqEcH0znLMWQDoAhPEpr5v31Ieq3 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771127267240670668 X-GMAIL-MSGID: 1771127267240670668 |
Series |
icc-rpmh multi-RSC voting groundwork
|
|
Message
Konrad Dybcio
July 11, 2023, 12:17 p.m. UTC
Many parts of Qualcomm SoCs are entirely independent of each other and can
run when the other parts are off. The RPMh system architecture embraces
this by giving each (loosely defined) subsystem its own connection (as in,
physical wires) to the AOSS, terminated by per-subsystem RSCs (Resource
State Coordinators) that barter for power, bandwidth etc.
This series introduces the groundwork necessary for voting for resources
through non-APPS RSCs. It should allow for lower-latency vote adjustments
(e.g. for very high bandwidth / multiple displays) and could potentially
allow for full APSS collapse while keeping e.g. MDSS operating (say
refreshing an image from a RAM buffer).
On top of that, a rather necessary and overdue cleanup is performed to
stop adding more and more arguments to the insane preprocessor macros.
Partially reverting (or reimplementing the revert) [1] will be necessary
to coordinate the rather complex relationship between the DPU and RSC
drivers.
The "Point x paths to the x RSC" patches won't do anything (check the
compatibility workaround qcom_icc_pre_aggregate()) until disp_rsc is
properly described in the device tree, along with its BCM voter),
but they prepare ground for when that happens.
I was able to test sending requests through the DISP_RSC on SM8450, but
I had to hack its clocks (_rscc_ in dispcc) to be always-on, as we don't
have any clk handling for qcom,rpmh-rsc today.
Boot-tested on SM8350 and SM8450, nothing exploded.
[1] https://patchwork.kernel.org/project/dri-devel/patch/1521827074-28424-1-git-send-email-ryadav@codeaurora.org/
Dependencies:
[2] https://lore.kernel.org/linux-arm-msm/113b50f8-35f6-73fc-4fc9-302262927c5e@quicinc.com/
[3] https://lore.kernel.org/linux-arm-msm/20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org/
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Konrad Dybcio (53):
dt-bindings: interconnect: qcom,icc: Introduce fixed BCM voter indices
dt-bindings: interconnect: qcom,bcm-voter: Add qcom,bcm-voter-idx
interconnect: qcom: icc-rpmh: Store direct BCM voter references
interconnect: qcom: icc-rpmh: Retire dead code
interconnect: qcom: icc-rpmh: Implement voting on non-APPS RSCs
interconnect: qcom: sc7180: Retire DEFINE_QNODE
interconnect: qcom: sdm670: Retire DEFINE_QNODE
interconnect: qcom: sdm845: Retire DEFINE_QNODE
interconnect: qcom: sdx55: Retire DEFINE_QNODE
interconnect: qcom: sdx65: Retire DEFINE_QNODE
interconnect: qcom: sm6350: Retire DEFINE_QNODE
interconnect: qcom: sm8150: Retire DEFINE_QNODE
interconnect: qcom: sm8250: Retire DEFINE_QNODE
interconnect: qcom: sm8350: Retire DEFINE_QNODE
interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE
interconnect: qcom: sc7180: Retire DEFINE_QBCM
interconnect: qcom: sdm670: Retire DEFINE_QBCM
interconnect: qcom: sdm845: Retire DEFINE_QBCM
interconnect: qcom: sdx55: Retire DEFINE_QBCM
interconnect: qcom: sdx65: Retire DEFINE_QBCM
interconnect: qcom: sm6350: Retire DEFINE_QBCM
interconnect: qcom: sm8150: Retire DEFINE_QBCM
interconnect: qcom: sm8250: Retire DEFINE_QBCM
interconnect: qcom: sm8350: Retire DEFINE_QBCM
interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM
interconnect: qcom: qdu1000: Explicitly assign voter_idx
interconnect: qcom: sa8775p: Explicitly assign voter_idx
interconnect: qcom: sc7280: Explicitly assign voter_idx
interconnect: qcom: sc8180x: Explicitly assign voter_idx
interconnect: qcom: sc8280xp: Explicitly assign voter_idx
interconnect: qcom: sm8450: Explicitly assign voter_idx
interconnect: qcom: sm8550: Explicitly assign voter_idx
arm64: dts: qcom: qdu1000: add qcom,bcm-voter-idx
arm64: dts: qcom: sa8775p: add qcom,bcm-voter-idx
arm64: dts: qcom: sc7180: add qcom,bcm-voter-idx
arm64: dts: qcom: sc7280: add qcom,bcm-voter-idx
arm64: dts: qcom: sc8180x: add qcom,bcm-voter-idx
arm64: dts: qcom: sc8280xp: add qcom,bcm-voter-idx
arm64: dts: qcom: sdm670: add qcom,bcm-voter-idx
arm64: dts: qcom: sdm845: add qcom,bcm-voter-idx
arm64: dts: qcom: sdx75: add qcom,bcm-voter-idx
arm64: dts: qcom: sm6350: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8150: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8250: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8350: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8450: add qcom,bcm-voter-idx
arm64: dts: qcom: sm8550: add qcom,bcm-voter-idx
arm64: dts: qcom: sdx55: add qcom,bcm-voter-idx
arm64: dts: qcom: sdx65: add qcom,bcm-voter-idx
interconnect: qcom: sm8350: Point display paths to the display RSC
interconnect: qcom: sm8450: Point display paths to the display RSC
interconnect: qcom: sm8550: Point display paths to the display RSC
interconnect: qcom: sm8550: Point camera paths to the camera RSC
.../bindings/interconnect/qcom,bcm-voter.yaml | 10 +
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 1 +
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 1 +
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 +
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +
arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +
arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +
drivers/interconnect/qcom/bcm-voter.c | 75 +-
drivers/interconnect/qcom/bcm-voter.h | 9 -
drivers/interconnect/qcom/icc-rpmh.c | 53 +-
drivers/interconnect/qcom/icc-rpmh.h | 14 +-
drivers/interconnect/qcom/qdu1000.c | 11 +
drivers/interconnect/qcom/sa8775p.c | 28 +
drivers/interconnect/qcom/sc7180.c | 1637 +++++++++++++++--
drivers/interconnect/qcom/sc7280.c | 27 +
drivers/interconnect/qcom/sc8180x.c | 23 +
drivers/interconnect/qcom/sc8280xp.c | 27 +
drivers/interconnect/qcom/sdm670.c | 1410 +++++++++++++--
drivers/interconnect/qcom/sdm845.c | 1683 ++++++++++++++++--
drivers/interconnect/qcom/sdx55.c | 863 ++++++++-
drivers/interconnect/qcom/sdx65.c | 850 ++++++++-
drivers/interconnect/qcom/sm6350.c | 1551 +++++++++++++++--
drivers/interconnect/qcom/sm8150.c | 1714 ++++++++++++++++--
drivers/interconnect/qcom/sm8250.c | 1772 +++++++++++++++++--
drivers/interconnect/qcom/sm8350.c | 1830 ++++++++++++++++++--
drivers/interconnect/qcom/sm8450.c | 24 +
drivers/interconnect/qcom/sm8550.c | 42 +
include/dt-bindings/interconnect/qcom,icc.h | 8 +
39 files changed, 12320 insertions(+), 1370 deletions(-)
---
base-commit: 82cee168d497ffcb79e4889fe3c7384788e89f4d
change-id: 20230708-topic-rpmh_icc_rsc-f897080fb207
Best regards,
Comments
Hi Konrad, On 11.07.23 15:17, Konrad Dybcio wrote: > Many parts of Qualcomm SoCs are entirely independent of each other and can > run when the other parts are off. The RPMh system architecture embraces > this by giving each (loosely defined) subsystem its own connection (as in, > physical wires) to the AOSS, terminated by per-subsystem RSCs (Resource > State Coordinators) that barter for power, bandwidth etc. > > This series introduces the groundwork necessary for voting for resources > through non-APPS RSCs. It should allow for lower-latency vote adjustments > (e.g. for very high bandwidth / multiple displays) and could potentially > allow for full APSS collapse while keeping e.g. MDSS operating (say > refreshing an image from a RAM buffer). This is good stuff. Thanks for working on it! Actually the path tagging, that have been introduced some time ago could be used for supporting the multiple RSCs. Today we can get the tags from DT, and tag the path with some DISP_RSC flag (for example) and avoid the qcom,bcm-voter-idx property. Mike has been also looking into this, so maybe he can share his thoughts. > > On top of that, a rather necessary and overdue cleanup is performed to > stop adding more and more arguments to the insane preprocessor macros. > Retiring the DEFINE_QNODE is good clean-up, but some patches failed to apply so a re-base would be needed. Thanks, Georgi > Partially reverting (or reimplementing the revert) [1] will be necessary > to coordinate the rather complex relationship between the DPU and RSC > drivers. > > The "Point x paths to the x RSC" patches won't do anything (check the > compatibility workaround qcom_icc_pre_aggregate()) until disp_rsc is > properly described in the device tree, along with its BCM voter), > but they prepare ground for when that happens. > > I was able to test sending requests through the DISP_RSC on SM8450, but > I had to hack its clocks (_rscc_ in dispcc) to be always-on, as we don't > have any clk handling for qcom,rpmh-rsc today. > > Boot-tested on SM8350 and SM8450, nothing exploded. > > [1] https://patchwork.kernel.org/project/dri-devel/patch/1521827074-28424-1-git-send-email-ryadav@codeaurora.org/ > > Dependencies: > [2] https://lore.kernel.org/linux-arm-msm/113b50f8-35f6-73fc-4fc9-302262927c5e@quicinc.com/ > [3] https://lore.kernel.org/linux-arm-msm/20230703-topic-8250_qup_icc-v2-0-9ba0a9460be2@linaro.org/ > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > Konrad Dybcio (53): > dt-bindings: interconnect: qcom,icc: Introduce fixed BCM voter indices > dt-bindings: interconnect: qcom,bcm-voter: Add qcom,bcm-voter-idx > interconnect: qcom: icc-rpmh: Store direct BCM voter references > interconnect: qcom: icc-rpmh: Retire dead code > interconnect: qcom: icc-rpmh: Implement voting on non-APPS RSCs > interconnect: qcom: sc7180: Retire DEFINE_QNODE > interconnect: qcom: sdm670: Retire DEFINE_QNODE > interconnect: qcom: sdm845: Retire DEFINE_QNODE > interconnect: qcom: sdx55: Retire DEFINE_QNODE > interconnect: qcom: sdx65: Retire DEFINE_QNODE > interconnect: qcom: sm6350: Retire DEFINE_QNODE > interconnect: qcom: sm8150: Retire DEFINE_QNODE > interconnect: qcom: sm8250: Retire DEFINE_QNODE > interconnect: qcom: sm8350: Retire DEFINE_QNODE > interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE > interconnect: qcom: sc7180: Retire DEFINE_QBCM > interconnect: qcom: sdm670: Retire DEFINE_QBCM > interconnect: qcom: sdm845: Retire DEFINE_QBCM > interconnect: qcom: sdx55: Retire DEFINE_QBCM > interconnect: qcom: sdx65: Retire DEFINE_QBCM > interconnect: qcom: sm6350: Retire DEFINE_QBCM > interconnect: qcom: sm8150: Retire DEFINE_QBCM > interconnect: qcom: sm8250: Retire DEFINE_QBCM > interconnect: qcom: sm8350: Retire DEFINE_QBCM > interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM > interconnect: qcom: qdu1000: Explicitly assign voter_idx > interconnect: qcom: sa8775p: Explicitly assign voter_idx > interconnect: qcom: sc7280: Explicitly assign voter_idx > interconnect: qcom: sc8180x: Explicitly assign voter_idx > interconnect: qcom: sc8280xp: Explicitly assign voter_idx > interconnect: qcom: sm8450: Explicitly assign voter_idx > interconnect: qcom: sm8550: Explicitly assign voter_idx > arm64: dts: qcom: qdu1000: add qcom,bcm-voter-idx > arm64: dts: qcom: sa8775p: add qcom,bcm-voter-idx > arm64: dts: qcom: sc7180: add qcom,bcm-voter-idx > arm64: dts: qcom: sc7280: add qcom,bcm-voter-idx > arm64: dts: qcom: sc8180x: add qcom,bcm-voter-idx > arm64: dts: qcom: sc8280xp: add qcom,bcm-voter-idx > arm64: dts: qcom: sdm670: add qcom,bcm-voter-idx > arm64: dts: qcom: sdm845: add qcom,bcm-voter-idx > arm64: dts: qcom: sdx75: add qcom,bcm-voter-idx > arm64: dts: qcom: sm6350: add qcom,bcm-voter-idx > arm64: dts: qcom: sm8150: add qcom,bcm-voter-idx > arm64: dts: qcom: sm8250: add qcom,bcm-voter-idx > arm64: dts: qcom: sm8350: add qcom,bcm-voter-idx > arm64: dts: qcom: sm8450: add qcom,bcm-voter-idx > arm64: dts: qcom: sm8550: add qcom,bcm-voter-idx > arm64: dts: qcom: sdx55: add qcom,bcm-voter-idx > arm64: dts: qcom: sdx65: add qcom,bcm-voter-idx > interconnect: qcom: sm8350: Point display paths to the display RSC > interconnect: qcom: sm8450: Point display paths to the display RSC > interconnect: qcom: sm8550: Point display paths to the display RSC > interconnect: qcom: sm8550: Point camera paths to the camera RSC > > .../bindings/interconnect/qcom,bcm-voter.yaml | 10 + > arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 1 + > arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 1 + > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 + > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 1 + > arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 + > arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 + > arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 + > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 + > arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 + > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 + > arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 + > arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 + > arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 + > arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 + > arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 + > arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 + > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 + > drivers/interconnect/qcom/bcm-voter.c | 75 +- > drivers/interconnect/qcom/bcm-voter.h | 9 - > drivers/interconnect/qcom/icc-rpmh.c | 53 +- > drivers/interconnect/qcom/icc-rpmh.h | 14 +- > drivers/interconnect/qcom/qdu1000.c | 11 + > drivers/interconnect/qcom/sa8775p.c | 28 + > drivers/interconnect/qcom/sc7180.c | 1637 +++++++++++++++-- > drivers/interconnect/qcom/sc7280.c | 27 + > drivers/interconnect/qcom/sc8180x.c | 23 + > drivers/interconnect/qcom/sc8280xp.c | 27 + > drivers/interconnect/qcom/sdm670.c | 1410 +++++++++++++-- > drivers/interconnect/qcom/sdm845.c | 1683 ++++++++++++++++-- > drivers/interconnect/qcom/sdx55.c | 863 ++++++++- > drivers/interconnect/qcom/sdx65.c | 850 ++++++++- > drivers/interconnect/qcom/sm6350.c | 1551 +++++++++++++++-- > drivers/interconnect/qcom/sm8150.c | 1714 ++++++++++++++++-- > drivers/interconnect/qcom/sm8250.c | 1772 +++++++++++++++++-- > drivers/interconnect/qcom/sm8350.c | 1830 ++++++++++++++++++-- > drivers/interconnect/qcom/sm8450.c | 24 + > drivers/interconnect/qcom/sm8550.c | 42 + > include/dt-bindings/interconnect/qcom,icc.h | 8 + > 39 files changed, 12320 insertions(+), 1370 deletions(-) > --- > base-commit: 82cee168d497ffcb79e4889fe3c7384788e89f4d > change-id: 20230708-topic-rpmh_icc_rsc-f897080fb207 > > Best regards,
On Thu, Aug 03, 2023 at 07:48:08PM +0300, Georgi Djakov wrote: > Hi Konrad, > > On 11.07.23 15:17, Konrad Dybcio wrote: > > Many parts of Qualcomm SoCs are entirely independent of each other and can > > run when the other parts are off. The RPMh system architecture embraces > > this by giving each (loosely defined) subsystem its own connection (as in, > > physical wires) to the AOSS, terminated by per-subsystem RSCs (Resource > > State Coordinators) that barter for power, bandwidth etc. > > > > This series introduces the groundwork necessary for voting for resources > > through non-APPS RSCs. It should allow for lower-latency vote adjustments > > (e.g. for very high bandwidth / multiple displays) and could potentially > > allow for full APSS collapse while keeping e.g. MDSS operating (say > > refreshing an image from a RAM buffer). > > This is good stuff. Thanks for working on it! Actually the path tagging, > that have been introduced some time ago could be used for supporting the > multiple RSCs. Today we can get the tags from DT, and tag the path with > some DISP_RSC flag (for example) and avoid the qcom,bcm-voter-idx property. > > Mike has been also looking into this, so maybe he can share his thoughts. > Yeah, the current way we've been supporting multiple voters (e.g. RSCs) doesn't scale. We currently duplicate the topology for any path that requires a secondary, non-APSS voter. Which means we have duplicates nodes and bindings for each hop in those paths, even though there's only a single logical path. For example, in qcom/sm8550.c, each node and BCM ending with _disp, _ife_0, _ife_1, or _ife_2 is a duplicate. The only reason they exist is to allow clients to target their votes to the non-APPS voters. And to provide separate, voter-specific buckets of aggregation. But everything else about them is 100% identical to their default APPS counterparts. For sm8550, this amounts to roughly 643 extra lines of code. Initially there was only the one secondary display voter, so the scaling problem wasn't a huge issue. But sm8550 has four voters. And future SOCs will have even more. We should only define the logical topology once. The ratio of NOC ports to interconnect nodes should be 1:1, rather than 1:N where N is the number of voters that care about them. The general idea is that we could use tags for this. So, instead of... path = icc_get(dev, MASTER_MDP_DISP, SLAVE_EBI1_DISP); it would be... path = icc_get(dev, MASTER_MDP, SLAVE_EBI1); icc_set_tag(path, QCOM_ICC_TAG_VOTER_DISP); I have an early prototype with basic testing already. I can hopefully clean it up and post for review in the next couple of weeks.
On Wed, Sep 06, 2023 at 02:14:14PM +0200, Konrad Dybcio wrote: > > The general idea is that we could use tags for this. So, instead of... > > > > path = icc_get(dev, MASTER_MDP_DISP, SLAVE_EBI1_DISP); > > > > it would be... > > > > path = icc_get(dev, MASTER_MDP, SLAVE_EBI1); > > icc_set_tag(path, QCOM_ICC_TAG_VOTER_DISP); > > > > I have an early prototype with basic testing already. I can hopefully > > clean it up and post for review in the next couple of weeks. > I was initially not very happy with this approach (overloading tags > with additional information), but it grew on me over time. > > My only concern is that if we reserve say bits 16-31 for path tags > (remember, dt-bindings are ABI), we may eventually run out of them. The voter tags wouldn't require bitmasks like the bucket tags do. We'd just need an integer for each voter shifted into the proper position in the tag value. Thus, reserving N bits for the voters would give us 2**N voters, which should be plenty. For example: #define QCOM_ICC_VOTERS_START 16 #define QCOM_ICC_VOTERS_END 23 #define QCOM_ICC_TAG_VOTER_HLOS (0 << QCOM_ICC_VOTERS_START) #define QCOM_ICC_TAG_VOTER_DISP (1 << QCOM_ICC_VOTERS_START) #define QCOM_ICC_TAG_VOTER_CAM_IFE_0 (2 << QCOM_ICC_VOTERS_START) #define QCOM_ICC_TAG_VOTER_CAM_IFE_1 (3 << QCOM_ICC_VOTERS_START) #define QCOM_ICC_TAG_VOTER_CAM_IFE_2 (4 << QCOM_ICC_VOTERS_START) The applicable voters should likely be defined in the target-specific headers, rather than the common qcom,icc.h. The bit range used for them could be common, but each target may only support a small subset of the total set of possible voters across all targets. Clients requiring multiple voters for the same logical path should be rare. On the off-chance they require that, they could just request the same path multiple times with different voter tags applied and call icc_set_bw() for each of them separately. I'm back from travel and vacation and plan to pick this up again soon.
On 13.09.2023 03:29, Mike Tipton wrote: > On Wed, Sep 06, 2023 at 02:14:14PM +0200, Konrad Dybcio wrote: >>> The general idea is that we could use tags for this. So, instead of... >>> >>> path = icc_get(dev, MASTER_MDP_DISP, SLAVE_EBI1_DISP); >>> >>> it would be... >>> >>> path = icc_get(dev, MASTER_MDP, SLAVE_EBI1); >>> icc_set_tag(path, QCOM_ICC_TAG_VOTER_DISP); >>> >>> I have an early prototype with basic testing already. I can hopefully >>> clean it up and post for review in the next couple of weeks. >> I was initially not very happy with this approach (overloading tags >> with additional information), but it grew on me over time. >> >> My only concern is that if we reserve say bits 16-31 for path tags >> (remember, dt-bindings are ABI), we may eventually run out of them. > > The voter tags wouldn't require bitmasks like the bucket tags do. We'd > just need an integer for each voter shifted into the proper position in > the tag value. Thus, reserving N bits for the voters would give us 2**N > voters, which should be plenty. For example: > > #define QCOM_ICC_VOTERS_START 16 > #define QCOM_ICC_VOTERS_END 23 > > #define QCOM_ICC_TAG_VOTER_HLOS (0 << QCOM_ICC_VOTERS_START) > #define QCOM_ICC_TAG_VOTER_DISP (1 << QCOM_ICC_VOTERS_START) > #define QCOM_ICC_TAG_VOTER_CAM_IFE_0 (2 << QCOM_ICC_VOTERS_START) > #define QCOM_ICC_TAG_VOTER_CAM_IFE_1 (3 << QCOM_ICC_VOTERS_START) > #define QCOM_ICC_TAG_VOTER_CAM_IFE_2 (4 << QCOM_ICC_VOTERS_START) > > The applicable voters should likely be defined in the target-specific > headers, rather than the common qcom,icc.h. The bit range used for them > could be common, but each target may only support a small subset of the > total set of possible voters across all targets. I'm not sure how client drivers would then choose the correct path other than switch (soc) { case 8450: tag = QCOM_ICC_TAG_VOTER_8450_HLOS; break; case 8550: tag = QCOM_ICC_TAG_VOTER_8550_HLOS; break; ... } which would be unacceptable. > Clients requiring multiple voters for the same logical path should be > rare. On the off-chance they require that, they could just request the > same path multiple times with different voter tags applied and call > icc_set_bw() for each of them separately. > > I'm back from travel and vacation and plan to pick this up again soon. Happy to hear that! Konrad
On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote: > > The applicable voters should likely be defined in the target-specific > > headers, rather than the common qcom,icc.h. The bit range used for them > > could be common, but each target may only support a small subset of the > > total set of possible voters across all targets. > I'm not sure how client drivers would then choose the > correct path other than > > switch (soc) { > case 8450: > tag = QCOM_ICC_TAG_VOTER_8450_HLOS; > break; > case 8550: > tag = QCOM_ICC_TAG_VOTER_8550_HLOS; > break; > ... > } > > which would be unacceptable. The same general way it's handled for the endpoint bindings, which are already target-specific. Any client drivers hardcoding the endpoint bindings in their driver would have to include the appropriate, target-specific binding header (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver file is itself target-specific. Otherwise, it would have to pull the endpoint bindings from devicetree. Or just use the recommended of_icc_get() and let devicetree do everything for them. Same for the target-specific voter tag bindings. Clients can also specify their tags in devicetree. They don't actually have to call icc_set_tag() directly. For example: #include <dt-bindings/interconnect/qcom,sm8450.h> interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>; Then when they call of_icc_get() for this path it'll automatically have QCOM_ICC_TAG_VOTER_DISP set for them.
On 14.09.2023 04:32, Mike Tipton wrote: > On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote: >>> The applicable voters should likely be defined in the target-specific >>> headers, rather than the common qcom,icc.h. The bit range used for them >>> could be common, but each target may only support a small subset of the >>> total set of possible voters across all targets. >> I'm not sure how client drivers would then choose the >> correct path other than >> >> switch (soc) { >> case 8450: >> tag = QCOM_ICC_TAG_VOTER_8450_HLOS; >> break; >> case 8550: >> tag = QCOM_ICC_TAG_VOTER_8550_HLOS; >> break; >> ... >> } >> >> which would be unacceptable. > > The same general way it's handled for the endpoint bindings, which are > already target-specific. > > Any client drivers hardcoding the endpoint bindings in their driver > would have to include the appropriate, target-specific binding header > (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver > file is itself target-specific. Otherwise, it would have to pull the > endpoint bindings from devicetree. Or just use the recommended > of_icc_get() and let devicetree do everything for them. Same for the > target-specific voter tag bindings. > > Clients can also specify their tags in devicetree. They don't actually > have to call icc_set_tag() directly. For example: > > #include <dt-bindings/interconnect/qcom,sm8450.h> > > interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP > &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>; > > Then when they call of_icc_get() for this path it'll automatically have > QCOM_ICC_TAG_VOTER_DISP set for them. I think I'd skew towards the "define everything in the DT" approach. One thing that makes me uneasy to go on with this approach is the question whether there is a case in which we would want to switch from e.g. voting through DISP to voting through APPS (or similar) from within a single device. Konrad
On Fri, Sep 15, 2023 at 03:43:27PM +0200, Konrad Dybcio wrote: > On 14.09.2023 04:32, Mike Tipton wrote: > > On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote: > >>> The applicable voters should likely be defined in the target-specific > >>> headers, rather than the common qcom,icc.h. The bit range used for them > >>> could be common, but each target may only support a small subset of the > >>> total set of possible voters across all targets. > >> I'm not sure how client drivers would then choose the > >> correct path other than > >> > >> switch (soc) { > >> case 8450: > >> tag = QCOM_ICC_TAG_VOTER_8450_HLOS; > >> break; > >> case 8550: > >> tag = QCOM_ICC_TAG_VOTER_8550_HLOS; > >> break; > >> ... > >> } > >> > >> which would be unacceptable. > > > > The same general way it's handled for the endpoint bindings, which are > > already target-specific. > > > > Any client drivers hardcoding the endpoint bindings in their driver > > would have to include the appropriate, target-specific binding header > > (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver > > file is itself target-specific. Otherwise, it would have to pull the > > endpoint bindings from devicetree. Or just use the recommended > > of_icc_get() and let devicetree do everything for them. Same for the > > target-specific voter tag bindings. > > > > Clients can also specify their tags in devicetree. They don't actually > > have to call icc_set_tag() directly. For example: > > > > #include <dt-bindings/interconnect/qcom,sm8450.h> > > > > interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP > > &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>; > > > > Then when they call of_icc_get() for this path it'll automatically have > > QCOM_ICC_TAG_VOTER_DISP set for them. > I think I'd skew towards the "define everything in the DT" approach. > > One thing that makes me uneasy to go on with this approach is the > question whether there is a case in which we would want to switch > from e.g. voting through DISP to voting through APPS (or similar) > from within a single device. It shouldn't be common. But it could be done fairly simply by listing paths for each different voter in the dt properties. interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_APPS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_APPS>, <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>, interconnect-names = "path-apps-voter", "path-disp-voter";
On 15.09.2023 18:05, Mike Tipton wrote: > On Fri, Sep 15, 2023 at 03:43:27PM +0200, Konrad Dybcio wrote: >> On 14.09.2023 04:32, Mike Tipton wrote: >>> On Wed, Sep 13, 2023 at 10:31:49AM +0200, Konrad Dybcio wrote: >>>>> The applicable voters should likely be defined in the target-specific >>>>> headers, rather than the common qcom,icc.h. The bit range used for them >>>>> could be common, but each target may only support a small subset of the >>>>> total set of possible voters across all targets. >>>> I'm not sure how client drivers would then choose the >>>> correct path other than >>>> >>>> switch (soc) { >>>> case 8450: >>>> tag = QCOM_ICC_TAG_VOTER_8450_HLOS; >>>> break; >>>> case 8550: >>>> tag = QCOM_ICC_TAG_VOTER_8550_HLOS; >>>> break; >>>> ... >>>> } >>>> >>>> which would be unacceptable. >>> >>> The same general way it's handled for the endpoint bindings, which are >>> already target-specific. >>> >>> Any client drivers hardcoding the endpoint bindings in their driver >>> would have to include the appropriate, target-specific binding header >>> (e.g. qcom,sm8550-rpmh.h). That would only be possible if their driver >>> file is itself target-specific. Otherwise, it would have to pull the >>> endpoint bindings from devicetree. Or just use the recommended >>> of_icc_get() and let devicetree do everything for them. Same for the >>> target-specific voter tag bindings. >>> >>> Clients can also specify their tags in devicetree. They don't actually >>> have to call icc_set_tag() directly. For example: >>> >>> #include <dt-bindings/interconnect/qcom,sm8450.h> >>> >>> interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP >>> &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>; >>> >>> Then when they call of_icc_get() for this path it'll automatically have >>> QCOM_ICC_TAG_VOTER_DISP set for them. >> I think I'd skew towards the "define everything in the DT" approach. >> >> One thing that makes me uneasy to go on with this approach is the >> question whether there is a case in which we would want to switch >> from e.g. voting through DISP to voting through APPS (or similar) >> from within a single device. > > It shouldn't be common. But it could be done fairly simply by listing > paths for each different voter in the dt properties. > > interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_APPS > &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_APPS>, > <&mmss_noc MASTER_MDP QCOM_ICC_TAG_VOTER_DISP > &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_VOTER_DISP>, > interconnect-names = "path-apps-voter", > "path-disp-voter"; Eeeeeh, I don't know.. this almost sounds like a patch-up solution to a problem that doesn't quite yet exist. I debated introducing a third interconnect cell for this, but I am not sure the added complexity is worth it. Having a global set of RSC-bound tags would be a "nice" and tidy solution.. Maybe we could even allocate like 24 bits to these, as I don't think you'll be introducing new buckets (or at least I hope you won't!). 24 is an obscene amount of RSCs to have, even counting virtual channels, so unless you folks have some dark plans to make all pieces of hardware powered completely separately from each other, I suppose I could ask for a pinky-promise to not exceed that number, ever :D Konrad