Message ID | 20230703185222.50554-1-andriy.shevchenko@linux.intel.com |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bk13-20020a056a02028d00b0055b6a784893si7445108pgb.520.2023.07.03.11.53.01; Mon, 03 Jul 2023 11:53:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="BkLmlfC/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231253AbjGCSwa (ORCPT <rfc822;ivan.orlov0322@gmail.com> + 99 others); Mon, 3 Jul 2023 14:52:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230395AbjGCSw2 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 3 Jul 2023 14:52:28 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00B41E6B; Mon, 3 Jul 2023 11:52:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688410347; x=1719946347; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=25ZLJW7OGmWWE2qbCthjIIhoB9XkL05rh/6oTpbhx6s=; b=BkLmlfC/Q0ssauCV4m26xLTNsJ7Jdij63hq19sPtFTnqu7JKC8f7gUno noozTR5LDCzNag7v57wnOgUxsnarRif4MNE6MbNP+ilUWSO21ay+GvqCe 7MREKf5FJgL2JPSqvwp4hfku0050AgxlU5howDxdp5MEGBHf4OUHv+NmC VC0Fl0uOV9p4PZ4pRW7PLJd5P5X4HarqOHYopqxY94Mf1h4YSra83GfKo Pkp1w+moIpv/W+sy+Fsp6Z8dolj7W+JFXxs3j0uKufhqKMfn54bqUn4/g ZHRW/qv0iY1m7R8Gmdi3nqraSAEtvrWh2BiVCxkz2sj8EHJyFNCGs3zlg Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10760"; a="347736197" X-IronPort-AV: E=Sophos;i="6.01,178,1684825200"; d="scan'208";a="347736197" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jul 2023 11:52:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10760"; a="842743322" X-IronPort-AV: E=Sophos;i="6.01,178,1684825200"; d="scan'208";a="842743322" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 03 Jul 2023 11:52:24 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1B021170; Mon, 3 Jul 2023 21:52:26 +0300 (EEST) From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>, linux-input@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jiri Kosina <jikos@kernel.org>, Benjamin Tissoires <benjamin.tissoires@redhat.com>, Andy Shevchenko <andy@kernel.org> Subject: [PATCH v1 00/12] HID: cp2112: Cleanups and refactorings Date: Mon, 3 Jul 2023 21:52:10 +0300 Message-Id: <20230703185222.50554-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.40.0.1.gaa8946217a0b MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770426619208520753?= X-GMAIL-MSGID: =?utf-8?q?1770426619208520753?= |
Series |
HID: cp2112: Cleanups and refactorings
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Message
Andy Shevchenko
July 3, 2023, 6:52 p.m. UTC
After I updated GPIO library for the case Benjamin has with CP2112, I have a brief look into the CP2112 driver itself. From GPIO perspective it has two main (maitenance) issues: - usage of ->to_irq() with IRQ chip present; - having IRQ chip not immutable. Besides that there are plenty small cleanups here and there. Hence this series. Compile tested only. Andy Shevchenko (12): lib/string_choices: Add str_write_read() helper HID: cp2112: Use str_write_read() and str_read_write() HID: cp2112: Make irq_chip immutable HID: cp2112: Switch to for_each_set_bit() to simplify the code HID: cp2112: Don't call ->to_irq() explicitly HID: cp2112: Remove dead code HID: cp2112: Define maximum GPIO constant and use it HID: cp2112: Define all GPIO mask and use it HID: cp2112: Use BIT() in GPIO setter and getter HID: cp2112: Use sysfs_emit() to instead of scnprintf() HID: cp2112: Convert to DEVICE_ATTR_RW() HID: cp2112: Use octal permissions drivers/hid/hid-cp2112.c | 169 +++++++++++---------------------- include/linux/string_choices.h | 1 + 2 files changed, 58 insertions(+), 112 deletions(-)
Comments
On Mon, Jul 03, 2023 at 09:52:10PM +0300, Andy Shevchenko wrote: > After I updated GPIO library for the case Benjamin has with CP2112, > I have a brief look into the CP2112 driver itself. > > From GPIO perspective it has two main (maitenance) issues: > - usage of ->to_irq() with IRQ chip present; > - having IRQ chip not immutable. > > Besides that there are plenty small cleanups here and there. > Hence this series. Any comments on this?
On Thu, Jul 27, 2023 at 09:43:29PM +0300, Andy Shevchenko wrote: > On Mon, Jul 03, 2023 at 09:52:10PM +0300, Andy Shevchenko wrote: > > After I updated GPIO library for the case Benjamin has with CP2112, > > I have a brief look into the CP2112 driver itself. > > > > From GPIO perspective it has two main (maitenance) issues: > > - usage of ->to_irq() with IRQ chip present; > > - having IRQ chip not immutable. > > > > Besides that there are plenty small cleanups here and there. > > Hence this series. > > Any comments on this? Gentle ping^2 for this... Anything should I do to improve it or is it okay to go as is?
On Fri, 4 Aug 2023, Andy Shevchenko wrote: > On Thu, Jul 27, 2023 at 09:43:29PM +0300, Andy Shevchenko wrote: > > On Mon, Jul 03, 2023 at 09:52:10PM +0300, Andy Shevchenko wrote: > > > After I updated GPIO library for the case Benjamin has with CP2112, > > > I have a brief look into the CP2112 driver itself. > > > > > > From GPIO perspective it has two main (maitenance) issues: > > > - usage of ->to_irq() with IRQ chip present; > > > - having IRQ chip not immutable. > > > > > > Besides that there are plenty small cleanups here and there. > > > Hence this series. > > > > Any comments on this? > > Gentle ping^2 for this... > > Anything should I do to improve it or is it okay to go as is? I have been off pretty much the whole July. I am now back and slowly making my way through everything that accumulated, I will eventually get to this. Thanks for the patience,
On Mon, Aug 07, 2023 at 01:19:54PM +0200, Jiri Kosina wrote: > On Fri, 4 Aug 2023, Andy Shevchenko wrote: > > On Thu, Jul 27, 2023 at 09:43:29PM +0300, Andy Shevchenko wrote: > > > On Mon, Jul 03, 2023 at 09:52:10PM +0300, Andy Shevchenko wrote: > > > > After I updated GPIO library for the case Benjamin has with CP2112, > > > > I have a brief look into the CP2112 driver itself. > > > > > > > > From GPIO perspective it has two main (maitenance) issues: > > > > - usage of ->to_irq() with IRQ chip present; > > > > - having IRQ chip not immutable. > > > > > > > > Besides that there are plenty small cleanups here and there. > > > > Hence this series. > > > > > > Any comments on this? > > > > Gentle ping^2 for this... > > > > Anything should I do to improve it or is it okay to go as is? > > I have been off pretty much the whole July. I am now back and slowly > making my way through everything that accumulated, I will eventually get > to this. > > Thanks for the patience, Ah, okay, no worries and take your time! I was thinking more on Benjamin's answer as last time he had a hw setup to test... Not sure what the status of that now and if he has a chance to test this or busy enough with something else.
On Mon, 7 Aug 2023, Andy Shevchenko wrote: > > > > > After I updated GPIO library for the case Benjamin has with CP2112, > > > > > I have a brief look into the CP2112 driver itself. > > > > > > > > > > From GPIO perspective it has two main (maitenance) issues: > > > > > - usage of ->to_irq() with IRQ chip present; > > > > > - having IRQ chip not immutable. > > > > > > > > > > Besides that there are plenty small cleanups here and there. > > > > > Hence this series. > > > > > > > > Any comments on this? > > > > > > Gentle ping^2 for this... > > > > > > Anything should I do to improve it or is it okay to go as is? > > > > I have been off pretty much the whole July. I am now back and slowly > > making my way through everything that accumulated, I will eventually get > > to this. > > > > Thanks for the patience, > > Ah, okay, no worries and take your time! > > I was thinking more on Benjamin's answer as last time he had a hw setup > to test... Not sure what the status of that now and if he has a chance > to test this or busy enough with something else. Ah, that would be of course nice. Benjamin? Thanks,
On Aug 21 2023, Andy Shevchenko wrote: > On Mon, Aug 14, 2023 at 11:28:58AM +0200, Jiri Kosina wrote: > > On Mon, 7 Aug 2023, Andy Shevchenko wrote: > > ... > > > > > > > > After I updated GPIO library for the case Benjamin has with CP2112, > > > > > > > I have a brief look into the CP2112 driver itself. > > > > > > > > > > > > > > From GPIO perspective it has two main (maitenance) issues: > > > > > > > - usage of ->to_irq() with IRQ chip present; > > > > > > > - having IRQ chip not immutable. > > > > > > > > > > > > > > Besides that there are plenty small cleanups here and there. > > > > > > > Hence this series. > > > > > > > > > > > > Any comments on this? > > > > > > > > > > Gentle ping^2 for this... > > > > > > > > > > Anything should I do to improve it or is it okay to go as is? > > > > > > > > I have been off pretty much the whole July. I am now back and slowly > > > > making my way through everything that accumulated, I will eventually get > > > > to this. > > > > > > > > Thanks for the patience, > > > > > > Ah, okay, no worries and take your time! > > > > > > I was thinking more on Benjamin's answer as last time he had a hw setup > > > to test... Not sure what the status of that now and if he has a chance > > > to test this or busy enough with something else. > > > > Ah, that would be of course nice. Benjamin? > > Benjamin? It almost full release cycle passed... > I understand if you are busy with something, just tell us. Sorry for not answering, I was off in August until just now. I tried you series just before taking time off, but the problem was that my automation relies on this driver to not be too far from the current upstream, as I need to patch it to be able to inject a node child in it. Which is why I was very interested in the ACPI/DT work so that I do not have to patch the driver. Long story short, I'm not able to test it right now (and I got quite some backlog as you can imagine). IIRC the code was fine, so I think we can just take the series as is, and work on the quirks (if any) later. Cheers, Benjamin