Message ID | 20230622011141.328029-1-ilkka@os.amperecomputing.com |
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perf: ampere: Add support for Ampere SoC PMUs
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Message
Ilkka Koskinen
June 22, 2023, 1:11 a.m. UTC
Changes since v3: * use_64b_counter_reg => has_atomic_dword (patch 1/4) * Removed the unnecessary hook for group validation (patch 3/4) * Added group config validation to ampere_cspmu_validate_event() (patch 4/4) * Rebased the patchset Changes since v2: * Changed to use supports_64bits_atomics() and replaced the split writes with lo_hi_writeq() * Added implementation specific group validation to patch 3 * Dropped shared interrupt patch * Removed unnecessary filter_enable parameter from ampere module * Added group validation to ampere module Changes since v1: * Rather than creating a completely new driver, implemented as a submodule of Arm CoreSight PMU driver * Fixed shared filter handling Ilkka Koskinen (4): perf: arm_cspmu: Split 64-bit write to 32-bit writes perf: arm_cspmu: Support implementation specific filters perf: arm_cspmu: Support implementation specific validation perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU .../admin-guide/perf/ampere_cspmu.rst | 29 +++ drivers/perf/arm_cspmu/Makefile | 2 +- drivers/perf/arm_cspmu/ampere_cspmu.c | 232 ++++++++++++++++++ drivers/perf/arm_cspmu/ampere_cspmu.h | 17 ++ drivers/perf/arm_cspmu/arm_cspmu.c | 28 ++- drivers/perf/arm_cspmu/arm_cspmu.h | 6 + 6 files changed, 309 insertions(+), 5 deletions(-) create mode 100644 Documentation/admin-guide/perf/ampere_cspmu.rst create mode 100644 drivers/perf/arm_cspmu/ampere_cspmu.c create mode 100644 drivers/perf/arm_cspmu/ampere_cspmu.h