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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:48 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH 0/9] MSM8998 clk cleanups and fixups Date: Thu, 22 Jun 2023 13:57:40 +0200 Message-Id: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIADQ3lGQC/x2NQQqDMBAAvyJ77kJMRBO/UnpI0lUXQ5TEloL4d 5ceZ2CYEyoVpgpjc0KhL1feskD7aCAuPs+E/BYGrbRRvdZ4bDtHtM7ZmFbsTDs4209GKQvSBF8 JQ/E5LlLlT0oi90IT//6T5+u6bmFhcrt0AAAA To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1563; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=beSw4DerolKlnlu7guVjHR7VZCdVcgsNzWLv04yx0RQ=; b=dmTfAs5cKF5NrvBkeFPCusReqVMFWBp/0hRrk9aYHwz75DJmkGWnJPX/Oj2+o2SaWp6w7ePHK i3dGNgZsQh9B+YeOuoMrV2nd7npc73BDOyCcDhcbbylQw8vMwVvny8O X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769404595287740543?= X-GMAIL-MSGID: =?utf-8?q?1769404595287740543?= The MSM8998 clock controller drivers have some rough edges around whether and how Linux should touch them, which this series tries to sand down a bit. MSM8998 maple seems not to explode, please give it a spin on your boards. Signed-off-by: Konrad Dybcio --- Konrad Dybcio (9): dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs dt-bindings: clock: qcom,mmcc: Add GPLL0_DIV for MSM8998 clk: qcom: gcc-msm8998: Control MMSS and GPUSS GPLL0 outputs properly clk: qcom: mmcc-msm8998: Properly consume GPLL0 inputs clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks clk: qcom: gcc-msm8998: Don't poke at some BIMC GPU clocks arm64: dts: qcom: msm8998: Use the correct GPLL0 leg for GPUCC arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCC .../devicetree/bindings/clock/qcom,mmcc.yaml | 2 + arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 +- drivers/clk/qcom/gcc-msm8998.c | 92 ++++++++++++++-------- drivers/clk/qcom/gpucc-msm8998.c | 2 +- drivers/clk/qcom/mmcc-msm8998.c | 35 ++------ include/dt-bindings/clock/qcom,gcc-msm8998.h | 3 + 6 files changed, 80 insertions(+), 62 deletions(-) --- base-commit: c87d46a9e8ebd2f2c3960927b1d21687096d1109 change-id: 20230622-topic-8998clk-4317986f3008 Best regards,