Message ID | 20230602062552.565992-1-anshuman.khandual@arm.com |
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Series |
arm64/sysreg: Convert TRBE registers to automatic generation
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Message
Anshuman Khandual
June 2, 2023, 6:25 a.m. UTC
This series converts TRBE registers to automatic generation, after renaming their fields as per the auto-gen tools format. Although the following field still renames in arch/arm64/include/asm/sysreg.h, as it cannot be converted (shares bits with other fields) in the tools format. #define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 This series applies on v6.4-rc4. Changes in V2: - Renamed each individual TRBE register fields as per auto-gen tools - Converted each individual TRBE registers as per auto-gen tools - Added new register fields as per DDI0601 2023-03 Changes in V1: https://lore.kernel.org/all/20230531055524.16562-1-anshuman.khandual@arm.com/ Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Anshuman Khandual (14): arm64/sysreg: Rename TRBLIMITR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBPTR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBBASER_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBSR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBMAR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBTRG_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBIDR_EL1 fields per auto-gen tools format arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generation arm64/sysreg: Convert TRBPTR_EL1 register to automatic generation arm64/sysreg: Convert TRBBASER_EL1 register to automatic generation arm64/sysreg: Convert TRBSR_EL1 register to automatic generation arm64/sysreg: Convert TRBMAR_EL1 register to automatic generation arm64/sysreg: Convert TRBTRG_EL1 register to automatic generation arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation arch/arm64/include/asm/el2_setup.h | 2 +- arch/arm64/include/asm/sysreg.h | 50 +-------------- arch/arm64/kvm/debug.c | 2 +- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 2 +- arch/arm64/tools/sysreg | 64 ++++++++++++++++++++ drivers/hwtracing/coresight/coresight-trbe.c | 33 +++++----- drivers/hwtracing/coresight/coresight-trbe.h | 38 +++++------- 7 files changed, 101 insertions(+), 90 deletions(-)
Comments
Hi Anshuman, On Fri, Jun 02, 2023 at 11:55:38AM +0530, Anshuman Khandual wrote: > Changes in V2: > > - Renamed each individual TRBE register fields as per auto-gen tools > - Converted each individual TRBE registers as per auto-gen tools > - Added new register fields as per DDI0601 2023-03 Mark had some comments about using Enum for some bitfields. While not essential, it would be nice to have those fixed. It's probably easier to do an incremental patch fixing those, so please post one (or repost the whole series, whatever is easier for you). Thanks.
On 6/8/23 23:09, Catalin Marinas wrote: > Hi Anshuman, > > On Fri, Jun 02, 2023 at 11:55:38AM +0530, Anshuman Khandual wrote: >> Changes in V2: >> >> - Renamed each individual TRBE register fields as per auto-gen tools >> - Converted each individual TRBE registers as per auto-gen tools >> - Added new register fields as per DDI0601 2023-03 > > Mark had some comments about using Enum for some bitfields. While not > essential, it would be nice to have those fixed. It's probably easier to > do an incremental patch fixing those, so please post one (or repost the > whole series, whatever is easier for you). Sure, will fold in those suggested changes and re-post the series soon.