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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id v3-20020a056512048300b004f3b258feefsm1031119lfq.179.2023.06.01.02.39.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 02:39:11 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH 0/2] Update parts of PLL_TEST_CTL(_U) if required Date: Thu, 01 Jun 2023 11:39:06 +0200 Message-Id: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIADpneGQC/x2N0QrCMAwAf2Xk2UC26R78FRFJ02gDpSvtFGHs3 w0+3sFxO3Rtph2uww5NP9ZtLQ7jaQBJXF6KFp1hommmhUbc1mqCnGvih2wZOVAU4jgvlzN4Fbg rhsZFknflnbPL2vRp3//mdj+OHyl+21d2AAAA To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Iskren Chernev Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685612350; l=944; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=IIHix1miPp0qtL4poKUvHfug4CBiAQj5S40QUBQ09Oc=; b=5RhikQiQfI+zL877J08QzRcusiyGzh3STK6XsgsBunSmpZG/FRrazcjiVqijI8nlRuz9Zkql3 OzKofyptzZZCCYboY2jT4W2Tlc/vEDd2w48En2F4F3MvUXB/BdFZoI8 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767493722236795125?= X-GMAIL-MSGID: =?utf-8?q?1767493722236795125?= Some recent-ish clock drivers touching on the "standard" Alpha PLLs have been specifying the values that should be written into the CTL registers as mask-value combos, but that wasn't always reflected properly (or at all). This series tries to fix that without affecitng the drivers that actually provide the full register values. Signed-off-by: Konrad Dybcio --- Konrad Dybcio (2): clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) clk: qcom: gcc-sm6115: Add missing PLL config properties drivers/clk/qcom/clk-alpha-pll.c | 19 +++++++++++++++---- drivers/clk/qcom/clk-alpha-pll.h | 2 ++ drivers/clk/qcom/gcc-sm6115.c | 8 ++++++++ 3 files changed, 25 insertions(+), 4 deletions(-) --- base-commit: 571d71e886a5edc89b4ea6d0fe6f445282938320 change-id: 20230601-topic-alpha_ctl-ab0dc0ad3654 Best regards,