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Tue, 23 May 2023 13:57:36 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3qpq9kjvsv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 23 May 2023 13:57:36 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 34NDvart032132; Tue, 23 May 2023 13:57:36 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-kbajaj-hyd.qualcomm.com [10.147.247.189]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 34NDvZPN032131; Tue, 23 May 2023 13:57:36 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 2340697) id 25C54529754; Tue, 23 May 2023 19:27:35 +0530 (+0530) From: Komal Bajaj To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Bhupesh Sharma Cc: Komal Bajaj , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 0/4] arm64: dts: qcom: qdu1000: add SDHCI Date: Tue, 23 May 2023 19:27:29 +0530 Message-Id: <20230523135733.3852-1-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.17.1 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: CiwWHCh7sqbc92iBA0pTR93-5fXN8EQ7 X-Proofpoint-ORIG-GUID: CiwWHCh7sqbc92iBA0pTR93-5fXN8EQ7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-23_09,2023-05-23_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 spamscore=0 suspectscore=0 clxscore=1015 adultscore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=756 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305230109 X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766694182126627502?= X-GMAIL-MSGID: =?utf-8?q?1766694182126627502?= Add sdhc instance for supporting eMMC on QDU1000 and QRU1000 SoCs. Changes in v3 - * Removed aliases and dropped "_1" suffix as suggested by Bjorn. * Changed pinconfig names. Changes in v2- * Updated the binding alphabetically. * Removed extra comments as suggested by Bhupesh. * Moved non-removable, no-sd, no-sdio and other properties from soc to board dts file as suggested by Bhupesh and Konrad. * Removed extra newlines and leading zeroes as suggested by Konrad. * Modified sdhc1_opp_table. * Updated the SDHC node entries alphabetically. * Moved the status entry at the end. Komal Bajaj (4): dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible arm: dts: qcom: qdu1000: Add SDHCI node arm64: dts: qcom: qdu1000: Add SDHCI pin configuration to DTSI arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc .../devicetree/bindings/mmc/sdhci-msm.yaml | 1 + arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++ arch/arm64/boot/dts/qcom/qdu1000.dtsi | 97 +++++++++++++++++++ 3 files changed, 121 insertions(+) --- 2.17.1