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Fri, 12 May 2023 12:21:43 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3qdy59u1uf-1; Fri, 12 May 2023 12:21:43 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 34CCLh6D028967; Fri, 12 May 2023 12:21:43 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-kbajaj-hyd.qualcomm.com [10.147.247.189]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 34CCLgMT028966; Fri, 12 May 2023 12:21:43 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 2340697) id 2EA6852974D; Fri, 12 May 2023 17:51:42 +0530 (+0530) From: Komal Bajaj To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Srinivas Kandagatla , Conor Dooley Cc: Komal Bajaj , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 00/10] soc: qcom: llcc: Add support for QDU1000/QRU1000 Date: Fri, 12 May 2023 17:51:24 +0530 Message-Id: <20230512122134.24339-1-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.17.1 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ZTmxwA9YlEPA9V1moDpalJbEDXlasAjy X-Proofpoint-GUID: ZTmxwA9YlEPA9V1moDpalJbEDXlasAjy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-12_08,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 phishscore=0 suspectscore=0 mlxscore=0 spamscore=0 mlxlogscore=725 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305120103 X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765691188888986902?= X-GMAIL-MSGID: =?utf-8?q?1765691188888986902?= This patch series does the following - * Add support for reading secure fuse region in qfprom driver * Add support for qfprom on QDU1000 and QRU1000 SoCs * Refactor LLCC driver to support multiple configuration * Add support for multi channel DDR configuration in LLCC * Add LLCC support for the Qualcomm QDU1000 and QRU1000 SoCs Changes in v3- - Addressed comments from Krzysztof and Mani. - Using qfprom to read DDR configuration from feature register. Changes in v2: - Addressing comments from Konrad. Komal Bajaj (10): nvmem: qfprom: Add support for secure reading dt-bindings: nvmem: qfprom: Add compatible for QDU1000/QRU1000 arm64: dts: qcom: qdu1000: Add properties to qfprom for multi channel DDR nvmem: qfprom: Add support for secure reading on QDU1000/QRU1000 soc: qcom: llcc: Refactor llcc driver to support multiple configuration soc: qcom: Add LLCC support for multi channel DDR dt-bindings: arm: msm: Add LLCC compatible for QDU1000/QRU1000 Revert "arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller" arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller soc: qcom: llcc: Add QDU1000 and QRU1000 LLCC support .../devicetree/bindings/cache/qcom,llcc.yaml | 2 + .../bindings/nvmem/qcom,qfprom.yaml | 1 + arch/arm64/boot/dts/qcom/qdu1000.dtsi | 30 +- drivers/nvmem/qfprom.c | 74 ++++- drivers/soc/qcom/llcc-qcom.c | 304 +++++++++++++----- include/linux/soc/qcom/llcc-qcom.h | 2 +- 6 files changed, 301 insertions(+), 112 deletions(-)