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Fri, 12 May 2023 01:27:42 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Thu, 11 May 2023 23:27:36 -0700 Received: from xhdthippesw40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Fri, 12 May 2023 01:27:33 -0500 From: Thippeswamy Havalige To: , , , CC: , , , , , , Thippeswamy Havalige Subject: [PATCH v2 0/3] Add support for Xilinx XDMA Soft IP as Root Port. Date: Fri, 12 May 2023 11:57:22 +0530 Message-ID: <20230512062725.1208385-1-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT038:EE_|CH3PR12MB7644:EE_ X-MS-Office365-Filtering-Correlation-Id: 124ea027-3c0e-45c3-18bd-08db52b2018e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rVTXynBQ3oQsQ9aVMy51qTOZklsIhYH+2RE+oWw+WTnb+yfwvI1Z7bo8V1d5W8Hi9Lkr3Lrt/zbWOii0L4UXR+IgeK2euUx8ovGmSVVnxk20aIWuzli2Pma6317Y3Z4UVP2rB57nw7Nj/sEE8bwCA4glvD64NTReukeMUFjZBY2lOldSZoUkMTI7LmKQ3bS9ZLuJmz8tuOlXbxMpI0VfXkIHJLeEyhTGiFsmgJGCKSohDXYXoVGsbulsXRTYSh9OHW0+xOZ84IwtJ9z7+YjYNBGPHmgzM6727NXWvqaunEDPQdmnKPZs5FxByxjSjPD8xzEuGL3tCuf9f8soC19/PcxjVLzkfWWu9sGqufLtM6E+LZQ9JB69LeyNtCLqbM5MyJpGHRKWHEYaJPh95G8sC+sRYIAAjklRPx516oMScW2Cd/G2THwfwTZ+SEuGjZ6BawNuXKbUjaX7XLKokQP8vRl9jWZ7eOAOj9pa/wnnSMAXJ4twJPwn4JOm3FmiQ7t4Jzt5nUezflvxGiwaUkRWmoi2AQFZjUIJxsfgX4k/uRojsCJcnxcjsS/5s64frqDcCX7NaeXuz2pSjvzAAqQp+VewURpxUX/SdpV9+ZXn7UAP3Gk04GYKaAWFe22h8OsSuENp7Bn1n0fGS9FVSdmtrazYPDyZr8BJ7mcBp+W0tPVbw1GADntJKmiURomSOjNMdxQbJjzWGwyleLdxBfqKqU6wK2p9y9qz0dbJyMpwRf9s0kd2Y6gZiomtA+Xp9vQKzC+osKDrFneVQtHywRFCvg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(376002)(39860400002)(136003)(396003)(451199021)(36840700001)(46966006)(40470700004)(82310400005)(40460700003)(54906003)(110136005)(316002)(41300700001)(6666004)(36756003)(478600001)(86362001)(4326008)(70206006)(70586007)(40480700001)(1076003)(83380400001)(26005)(2616005)(186003)(82740400003)(426003)(336012)(356005)(81166007)(5660300002)(8676002)(8936002)(44832011)(47076005)(2906002)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2023 06:27:48.5240 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 124ea027-3c0e-45c3-18bd-08db52b2018e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7644 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765668884344012217?= X-GMAIL-MSGID: =?utf-8?q?1765668884344012217?= This series of patch add support for Xilinx XDMA Soft IP as Root Port. The Xilinx XDMA Soft IP support's 32 bit and 64bit BAR's. As Root Port it supports MSI and legacy interrupts. For code reusability existing CPM4 error interrupt bits are moved to common header. Signed-off-by: Thippeswamy Havalige Signed-off-by: Bharat Kumar Gogada --- Thippeswamy Havalige (3): Move error interrupt bits to a common header. dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe Root Port Bridge PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver .../devicetree/bindings/pci/xlnx,xdma-host.yaml | 117 +++ drivers/pci/controller/Kconfig | 10 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-xdma-pl.c | 800 +++++++++++++++++++++ drivers/pci/controller/pcie-xilinx-common.h | 31 + drivers/pci/controller/pcie-xilinx-cpm.c | 38 +- 6 files changed, 966 insertions(+), 31 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml create mode 100644 drivers/pci/controller/pcie-xdma-pl.c create mode 100644 drivers/pci/controller/pcie-xilinx-common.h