Message ID | 20230417103226.334588-1-thippeswamy.havalige@amd.com |
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Mon, 17 Apr 2023 05:33:17 -0500 Received: from xhdthippesw40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Mon, 17 Apr 2023 05:33:14 -0500 From: Thippeswamy Havalige <thippeswamy.havalige@amd.com> To: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <krzysztof.kozlowski@linaro.org> CC: <bhelgaas@google.com>, <michals@xilinx.com>, <robh+dt@kernel.org>, <nagaradhesh.yeleswarapu@amd.com>, <bharat.kumar.gogada@amd.com>, <lorenzo.pieralisi@arm.com>, Thippeswamy Havalige <thippeswamy.havalige@amd.com> Subject: [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port. 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Add support for Xilinx XDMA Soft IP as Root Port.
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Message
Havalige, Thippeswamy
April 17, 2023, 10:32 a.m. UTC
This series of patch add support for Xilinx XDMA Soft IP as Root Port. The Xilinx XDMA Soft IP support's 32 bit and 64bit BAR's. As Root Port it supports MSI and legacy interrupts. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> --- Thippeswamy Havalige (2): dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe Root Port Bridge PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver .../bindings/pci/xlnx,xdma-host.yaml | 117 +++ drivers/pci/controller/Kconfig | 10 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-xdma-pl.c | 877 ++++++++++++++++++ 4 files changed, 1005 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml create mode 100644 drivers/pci/controller/pcie-xdma-pl.c