From patchwork Thu Apr 13 22:30:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 8147 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1359462vqo; Thu, 13 Apr 2023 15:32:23 -0700 (PDT) X-Google-Smtp-Source: AKy350ZsHqgu8wwfpi+QPZ8YL1fn1OeFaRmw5nZPtgCTK/qul042Xxq5DLN+goKgoHr9w650Tbxj X-Received: by 2002:a05:6a20:4a0a:b0:eb:b99b:917 with SMTP id fr10-20020a056a204a0a00b000ebb99b0917mr3239206pzb.38.1681425143684; Thu, 13 Apr 2023 15:32:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681425143; cv=none; d=google.com; s=arc-20160816; b=OqxWCC8UiuyPNGqM++qbfO0tLhLgAu//iAJ8iwtPCqCKoOjaew+CZH+BXeNlJD3FgQ 8uELS24MqxfxY41oikbwQrwJpcaO2zo46WLYvP0HSqcDDeNwCiVqswzOmvQs7l0mSj65 sryetvj24YSJajy7xhfmrTVtjImUKc0o2wphyLoHKbPDgo2Nr3fEgKI59Y4s7b70KwOF aoa3hZBKzIETDCV6GLigkioJYH2Gn/KWvjP+Tuw/4LKJworTxYDo/ExbPxHjgQwei7AE fLUq/MXcD7z9v2K/PgXEaviNcWYH62Yt9cgbfuAEdJTfWlyrU0tc90idaHws2JPHcO9d 2inA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from :dkim-signature; bh=nfApsyYB3BUy/ITs1HPtXb0cFGwPSOPtBeaWo+Jeuzk=; b=hH2OYqUiG++/0dQQ1ZycuyVgcrZlLrI7PyFWB+BStyAtSokNe2cDOFf8y58z6pD3Oo GiiV6NS/1RaZZwSQmRaHbaxZvCrG0a7G23+/I/On8tKLa9td6WyYCkT7aEN+nF4B/WT3 iiGipFkRwohtZMaPr0BBw+L2BwOSFD1ZQeyBBnINnYquoAeQt0XuzXX3rR82mlKXrgq0 k5EjPd4ZWaRq9n+6V7M69ElCtJQfy20IXV44U5RG4k+Lr2ktPs/7xUHrUHSxaNP7lESl isk5mFC4YAXPW139MHvThXoA9ThgDy2fyAc5gcGjNMYmqROl1+xXRllArIBw7T4QTFhg oIBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PNPlA0NH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b3-20020a656683000000b00518fc071a25si2869563pgw.391.2023.04.13.15.32.12; Thu, 13 Apr 2023 15:32:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PNPlA0NH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230265AbjDMWb2 (ORCPT + 99 others); Thu, 13 Apr 2023 18:31:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229893AbjDMWbO (ORCPT ); Thu, 13 Apr 2023 18:31:14 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5DE47AB4; Thu, 13 Apr 2023 15:31:13 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33DMUqbK021536; Thu, 13 Apr 2023 17:30:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681425052; bh=nfApsyYB3BUy/ITs1HPtXb0cFGwPSOPtBeaWo+Jeuzk=; h=From:To:CC:Subject:Date; b=PNPlA0NHZqOF40WSspt3QOwIOM/Y6D9O1p/GLbVWwVwUEqX59l8Gj5TIQJV4I4MJP AGhnwFWFwe3aKJFxQwsRd+Tu+9RbJ9a/kDUZgxrHi0x7pCH6syuMF4p8jkDWDXF8Mq 6nh3JjQJ04GCiARJp3gparEgl5Oire7vwDhJGMeE= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33DMUqtb051530 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 13 Apr 2023 17:30:52 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Thu, 13 Apr 2023 17:30:51 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Thu, 13 Apr 2023 17:30:51 -0500 Received: from a0498204.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33DMUpa3063427; Thu, 13 Apr 2023 17:30:51 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan CC: Nishanth Menon , Vignesh Raghavendra , Andrew Davis , Wolfgang Grandegger , Marc Kleine-Budde , Rob Herring , Krzysztof Kozlowski , , , , , Schuyler Patton Subject: [RFC PATCH 0/5] Enable multiple MCAN on AM62x Date: Thu, 13 Apr 2023 17:30:46 -0500 Message-ID: <20230413223051.24455-1-jm@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763102051417367168?= X-GMAIL-MSGID: =?utf-8?q?1763102051417367168?= On AM62x there is one MCAN in MAIN domain and two in MCU domain. The MCANs in MCU domain were not enabled since there is no hardware interrupt routed to A53 GIC interrupt controller. Therefore A53 Linux cannot be interrupted by MCU MCANs. This solution instantiates a hrtimer with 1 ms polling interval for a MCAN when there is no hardware interrupt. This hrtimer generates a recurring software interrupt which allows to call the isr. The isr will check if there is pending transaction by reading a register and proceed normally if there is. On AM62x this series enables two MCU MCAN which will use the hrtimer implementation. MCANs with hardware interrupt routed to A53 Linux will continue to use the hardware interrupt as expected. Timer polling method was tested on both classic CAN and CAN-FD at 125 KBPS, 250 KBPS, 1 MBPS and 2.5 MBPS with 4 MBPS bitrate switching. Letency and CPU load benchmarks were tested on 3x MCAN on AM62x. 1 MBPS timer polling interval is the better timer polling interval since it has comparable latency to hardware interrupt with the worse case being 1ms + CAN frame propagation time and CPU load is not substantial. Latency can be improved further with less than 1 ms polling intervals, howerver it is at the cost of CPU usage since CPU load increases at 0.5 ms and lower polling periods than 1ms. Note that in terms of power, enabling MCU MCANs with timer-polling implementation might have negative impact since we will have to wake up every 1 ms whether there are CAN packets pending in the RX FIFO or not. This might prevent the CPU from entering into deeper idle states for extended periods of time. This patch series depends on 'Enable CAN PHY transceiver driver': https://lore.kernel.org/lkml/775ec9ce-7668-429c-a977-6c8995968d6e@app.fastmail.com/T/ Judith Mendez (5): arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay arm64: defconfig: Enable MCAN driver dt-binding: can: m_can: Remove required interrupt attributes arm64: dts: ti: Enable multiple MCAN for AM62x in MCU MCAN overlay can: m_can: Add hrtimer to generate software interrupt .../bindings/net/can/bosch,m_can.yaml | 2 - arch/arm64/boot/dts/ti/Makefile | 2 + .../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 +++++++++ .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 75 +++++++++++++++++++ arch/arm64/configs/defconfig | 2 + drivers/net/can/m_can/m_can.c | 24 +++++- drivers/net/can/m_can/m_can.h | 3 + drivers/net/can/m_can/m_can_platform.c | 9 ++- 8 files changed, 146 insertions(+), 6 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso