mbox series

[v3,0/3] Increase the number of IRQ descriptors for SPARSEIRQ

Message ID 20230410155721.3720991-1-sdonthineni@nvidia.com
Headers
Series Increase the number of IRQ descriptors for SPARSEIRQ |

Message

Shanker Donthineni April 10, 2023, 3:57 p.m. UTC 
  The ARM64 architecture uses SPARSEIRQ with a default value of NR_IRQS,
which is set to 64. This means that only 64+8192 IRQ descriptors are
allowed, which may not be sufficient for modern ARM64 servers that
have a large number of IO devices and GIC hardware that supports
direct vSGI and vLPI injection features.

This limitation has caused issues when attempting to launch multiple
virtual machines with GICv4.1 features, resulting in the error message
'kvm_err("VPE IRQ allocation failure\n")'. The root cause of this issue
is the ~8K IRQ descriptor limit.

To address this issue, an initial proposal was made to define NR_IRQS
to 2^19 for ARM64. However, Marc Zyngier suggested implementing a
generic solution instead of hard-coded values. Thomas Gleixner advised
to use the maple tree data structure and provided most of the necessary
functions.

For more information, refer to the discussion thread at
https://lore.kernel.org/linux-arm-kernel/20230104023738.1258925-1-sdonthineni@nvidia.com/.

This patch series converts the static memory allocation to dynamic using
the maple tree, and increases the maximum number of IRQ descriptors to
INT_MAX from NR_IRQS+8192. This change has been tested on an ARM64 server
with CONFIG_SPARSE_IRQ=y, where 256 virtual machines were launched,
creating a total of 128K+ IRQ descriptors, and IRQ injection was verified.

Changes in v3:
  - Edited commit text
  - Added a helper function irq_resend_init()
  - Rebased to v6.3-rc6

Changes in v2:
  - The patches have been updated to v6.3-rc5.
  - The patches 2/5 and 4/5 have been removed as they are unnecessary.
  - The review comments from Thomas have been addressed.

Shanker Donthineni (3):
  genirq: Use hlist for managing resend handlers
  genirq: Encapsulate sparse bitmap handling
  genirq: Use the maple tree for IRQ descriptors management

 include/linux/irqdesc.h |  3 ++
 kernel/irq/chip.c       |  1 +
 kernel/irq/internals.h  |  6 ++--
 kernel/irq/irqdesc.c    | 76 +++++++++++++++++++++++++----------------
 kernel/irq/resend.c     | 47 ++++++++++++++++---------
 5 files changed, 85 insertions(+), 48 deletions(-)

Comments

Shanker Donthineni April 15, 2023, 3:49 p.m. UTC | #1 
Hello Thomas,

I wanted to update you that all the review comments have been resolved and
the necessary fixes for the maple tree have been integrated into the mainline.
If there are any outstanding tasks required to consider it for the upcoming
v6.4 release, please let me know.

Thanks,
Shanker

On 4/10/23 10:57, Shanker Donthineni wrote:
> The ARM64 architecture uses SPARSEIRQ with a default value of NR_IRQS,
> which is set to 64. This means that only 64+8192 IRQ descriptors are
> allowed, which may not be sufficient for modern ARM64 servers that
> have a large number of IO devices and GIC hardware that supports
> direct vSGI and vLPI injection features.
> 
> This limitation has caused issues when attempting to launch multiple
> virtual machines with GICv4.1 features, resulting in the error message
> 'kvm_err("VPE IRQ allocation failure\n")'. The root cause of this issue
> is the ~8K IRQ descriptor limit.
> 
> To address this issue, an initial proposal was made to define NR_IRQS
> to 2^19 for ARM64. However, Marc Zyngier suggested implementing a
> generic solution instead of hard-coded values. Thomas Gleixner advised
> to use the maple tree data structure and provided most of the necessary
> functions.
> 
> For more information, refer to the discussion thread at
> https://lore.kernel.org/linux-arm-kernel/20230104023738.1258925-1-sdonthineni@nvidia.com/.
> 
> This patch series converts the static memory allocation to dynamic using
> the maple tree, and increases the maximum number of IRQ descriptors to
> INT_MAX from NR_IRQS+8192. This change has been tested on an ARM64 server
> with CONFIG_SPARSE_IRQ=y, where 256 virtual machines were launched,
> creating a total of 128K+ IRQ descriptors, and IRQ injection was verified.
> 
> Changes in v3:
>    - Edited commit text
>    - Added a helper function irq_resend_init()
>    - Rebased to v6.3-rc6
> 
> Changes in v2:
>    - The patches have been updated to v6.3-rc5.
>    - The patches 2/5 and 4/5 have been removed as they are unnecessary.
>    - The review comments from Thomas have been addressed.
> 
> Shanker Donthineni (3):
>    genirq: Use hlist for managing resend handlers
>    genirq: Encapsulate sparse bitmap handling
>    genirq: Use the maple tree for IRQ descriptors management
> 
>   include/linux/irqdesc.h |  3 ++
>   kernel/irq/chip.c       |  1 +
>   kernel/irq/internals.h  |  6 ++--
>   kernel/irq/irqdesc.c    | 76 +++++++++++++++++++++++++----------------
>   kernel/irq/resend.c     | 47 ++++++++++++++++---------
>   5 files changed, 85 insertions(+), 48 deletions(-)
>
Thomas Gleixner April 15, 2023, 9:50 p.m. UTC | #2 
On Sat, Apr 15 2023 at 10:49, Shanker Donthineni wrote:
> Hello Thomas,
>
> I wanted to update you that all the review comments have been resolved and
> the necessary fixes for the maple tree have been integrated into the mainline.
> If there are any outstanding tasks required to consider it for the upcoming
> v6.4 release, please let me know.

It's on my todo list and as I'm traveling next week I might not come
around to review/merge this right now.

I'll get to it.

Thanks,

        tglx