From patchwork Thu Apr 6 10:20:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hariprasad Kelam X-Patchwork-Id: 7807 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp918691vqo; Thu, 6 Apr 2023 03:33:05 -0700 (PDT) X-Google-Smtp-Source: AKy350ZWEgzrLUasKw9CE8uOh5VBm4wVP/Lm6FxcwZjg/z47purF24l2faaZ0/wTWl6MJ6NatA+H X-Received: by 2002:a17:906:6993:b0:932:615c:33d4 with SMTP id i19-20020a170906699300b00932615c33d4mr5006612ejr.34.1680777185047; Thu, 06 Apr 2023 03:33:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680777185; cv=none; d=google.com; s=arc-20160816; b=OdyV3mRN7oUflt422xJGm4mNjSpagXggYwd8qVqZC1Du6MxxXuosPa/7v/d88pKaVa NUfYFvp/V7rDpFw/AZuA0EyhXNDw4sLzDmeAPzWh5aIx/zqNVh2TgrsjkzNcMxLgUVmz A32cT41F0DdMUD4TsjNA48yigs0LRDqe/5vwur/O1Y6J5qef9wIgKOJYHLc9nJn3mKLE d8HOPAlr4xiyongE9zfOM39gzliyU4OsIH9a1rIwCSvDpq1iVW9KQZ4GJCHn6pbjSMfb 5sk0zslBHr/F/Y1yrk6QTpa1Ufz0oMi6z0Rpe8q5l99NVPOcdtlhuPs0iialXTf7Olt8 B2sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from :dkim-signature; bh=c/JfjstkzVUxte7u7TVRNQAxDW14X4Xn2oG0MaNMY2M=; b=IV4+yJ4GxGSsU4j8Wo3+H1VuBcW7nmMgkPU13P/wBEAeBFLgRpQbufBSQ2qLFjlUdN 4W5fNC44dNgYYRf0znxPllRUeu/5UBleTp9Ss2ahV4oTMen30cwtZyNNW7X22sa33ArN 9WaScdMOO7o/DHReAM4FkF8uBDndFmw1zBZ3guLORavbFd501SPG0f0kl7pZU6RSTbaa cxAQnFk+GXZjOfFzC/A4M/572cAFkP4LyvO/uvTUxmC/KmdpxRm4JoKIrqYDbSerWhN7 lT+r7y/wqCL/veux4uUHwOsqClJB8o6yj6E12HPsZgk/vCm8tKQ54HwiUwlTszkfFZJ9 8mcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=k29QM3kl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id lr10-20020a170906fb8a00b00947f7baf08asi784611ejb.102.2023.04.06.03.32.40; Thu, 06 Apr 2023 03:33:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=k29QM3kl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236955AbjDFKVg (ORCPT + 99 others); Thu, 6 Apr 2023 06:21:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235960AbjDFKVb (ORCPT ); Thu, 6 Apr 2023 06:21:31 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 298D43C12; Thu, 6 Apr 2023 03:21:30 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3365ZOvE017988; Thu, 6 Apr 2023 03:21:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0220; bh=c/JfjstkzVUxte7u7TVRNQAxDW14X4Xn2oG0MaNMY2M=; b=k29QM3kleiB7RWqwjHnGFe9T1uUZvUNNV4J8XTpnGc2AUoDWjkUwm/aujkMSMKNs3cvh IPvLTXa54WOJmC7sHCL9PM96UC511hZFiC367B/hjMxmKJAOKjFw/JezdpnYtvu0HsFB MTAuTLUEzmFRJQBG9LJV8NkauUBQ4litQM3SOXJQXuS7WRITLYRj190FN/mjb7krR9jj Nb/Wm46TYAXcDfA/+VWLFf5FIXyQZU0yxTBIqQDtmnvwfTqpliJ7mte1Om5+ofo9bmpH BcvTiwHc5hrombYAXek/T3XMAvsS7UngIxr8NSs5aAJOGc/o1Yi95oRJevn8tTHfnG8g cw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3psr2e1ck5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 06 Apr 2023 03:21:11 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 6 Apr 2023 03:21:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 6 Apr 2023 03:21:09 -0700 Received: from hyd1soter3.marvell.com (unknown [10.29.37.12]) by maili.marvell.com (Postfix) with ESMTP id 43B053F706F; Thu, 6 Apr 2023 03:21:03 -0700 (PDT) From: Hariprasad Kelam To: , CC: , , , , , , , , , , , , , , , , Subject: [net-next Patch v6 0/6] octeontx2-pf: HTB offload support Date: Thu, 6 Apr 2023 15:50:57 +0530 Message-ID: <20230406102103.19910-1-hkelam@marvell.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Proofpoint-GUID: ojQ1hf4F9BFglcbaQnlzKB7dyytdNrjH X-Proofpoint-ORIG-GUID: ojQ1hf4F9BFglcbaQnlzKB7dyytdNrjH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-06_04,2023-04-06_01,2023-02-09_01 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762422617663150525?= X-GMAIL-MSGID: =?utf-8?q?1762422617663150525?= octeontx2 silicon and CN10K transmit interface consists of five transmit levels starting from MDQ, TL4 to TL1. Once packets are submitted to MDQ, hardware picks all active MDQs using strict priority, and MDQs having the same priority level are chosen using round robin. Each packet will traverse MDQ, TL4 to TL1 levels. Each level contains an array of queues to support scheduling and shaping. As HTB supports classful queuing mechanism by supporting rate and ceil and allow the user to control the absolute bandwidth to particular classes of traffic the same can be achieved by configuring shapers and schedulers on different transmit levels. This series of patches adds support for HTB offload, Patch1: Allow strict priority parameter in HTB offload mode. Patch2: Rename existing total tx queues for better readability Patch3: defines APIs such that the driver can dynamically initialize/ deinitialize the send queues. Patch4: Refactors transmit alloc/free calls as preparation for QOS offload code. Patch5: Adds actual HTB offload support. Patch6: Add documentation about htb offload flow in driver Hariprasad Kelam (3): octeontx2-pf: Rename tot_tx_queues to non_qos_queues octeontx2-pf: Refactor schedular queue alloc/free calls docs: octeontx2: Add Documentation for QOS Naveen Mamindlapalli (2): sch_htb: Allow HTB priority parameter in offload mode octeontx2-pf: Add support for HTB offload Subbaraya Sundeep (1): octeontx2-pf: qos send queues management ----- v1 -> v2 : ensure other drivers won't affect by allowing 'prio' a parameter in htb offload mode. v2 -> v3 : 1. discard patch supporting devlink to configure TL1 round robin priority 2. replace NL_SET_ERR_MSG with NL_SET_ERR_MSG_MOD 3. use max3 instead of using max couple of times and use a better naming convention in send queue management code. v3 -> v4: 1. fix sparse warnings. 2. release mutex lock in error conditions. v4 -> v5: 1. fix pahole reported issues 2. add documentation for htb offload flow. v5 -> v6: 1. fix synchronization issues w.r.t hlist accessing from ndo_select_queue with rcu lock. 2. initialize qos related resources in device init. .../ethernet/marvell/octeontx2.rst | 39 + .../ethernet/marvell/octeontx2/af/common.h | 2 +- .../marvell/octeontx2/af/rvu_debugfs.c | 5 + .../ethernet/marvell/octeontx2/af/rvu_nix.c | 45 + .../ethernet/marvell/octeontx2/nic/Makefile | 2 +- .../marvell/octeontx2/nic/otx2_common.c | 120 +- .../marvell/octeontx2/nic/otx2_common.h | 53 +- .../marvell/octeontx2/nic/otx2_ethtool.c | 31 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 114 +- .../ethernet/marvell/octeontx2/nic/otx2_reg.h | 13 + .../ethernet/marvell/octeontx2/nic/otx2_tc.c | 7 +- .../marvell/octeontx2/nic/otx2_txrx.c | 24 +- .../marvell/octeontx2/nic/otx2_txrx.h | 3 +- .../ethernet/marvell/octeontx2/nic/otx2_vf.c | 14 +- .../net/ethernet/marvell/octeontx2/nic/qos.c | 1469 +++++++++++++++++ .../net/ethernet/marvell/octeontx2/nic/qos.h | 69 + .../ethernet/marvell/octeontx2/nic/qos_sq.c | 296 ++++ .../net/ethernet/mellanox/mlx5/core/en/qos.c | 7 +- include/net/pkt_cls.h | 1 + net/sched/sch_htb.c | 7 +- 20 files changed, 2216 insertions(+), 105 deletions(-) create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/qos.c create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/qos.h create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c --- 2.17.1