Message ID | 20230403102551.3763054-1-sai.krishna.potthuri@amd.com |
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Mon, 3 Apr 2023 05:26:08 -0500 Received: from xhdlakshmis40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Mon, 3 Apr 2023 05:26:05 -0500 From: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Michal Simek <michal.simek@xilinx.com>, Adrian Hunter <adrian.hunter@intel.com> CC: <linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <git@amd.com>, <saikrishna12468@gmail.com>, Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Subject: [PATCH v3 0/3] mmc: sdhci-of-arasan: Add eMMC5.1 support for Xilinx Versal Net Date: Mon, 3 Apr 2023 15:55:48 +0530 Message-ID: <20230403102551.3763054-1-sai.krishna.potthuri@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT094:EE_|CH0PR12MB5316:EE_ X-MS-Office365-Filtering-Correlation-Id: 664bef3e-e380-49db-0d82-08db342dd765 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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mmc: sdhci-of-arasan: Add eMMC5.1 support for Xilinx Versal Net
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Message
Sai Krishna Potthuri
April 3, 2023, 10:25 a.m. UTC
Add eMMC5.1 support for Xilinx Versal Net platform which has PHY within the Host Controller space. Also, add Xilinx Versal Net compatible for eMMC5.1 in DT binding. changes in v3: -> Split the 2/2 patch into two, created separate patch(3/3) to skip the clock delay setting for 400KHz as suggested by Adrian Hunter. changes in v2: -> 1/2 - Removed v5.1 from compatible string as suggested by Krzysztof. Sai Krishna Potthuri (2): dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net compatible mmc: sdhci-of-arasan: Skip setting clock delay for 400KHz Swati Agarwal (1): mmc: sdhci-of-arasan: Add support for eMMC5.1 on Xilinx Versal Net platform .../devicetree/bindings/mmc/arasan,sdhci.yaml | 5 + drivers/mmc/host/sdhci-of-arasan.c | 237 +++++++++++++++++- 2 files changed, 241 insertions(+), 1 deletion(-)
Comments
On Mon, 3 Apr 2023 at 12:26, Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> wrote: > > Add eMMC5.1 support for Xilinx Versal Net platform which has PHY within > the Host Controller space. > Also, add Xilinx Versal Net compatible for eMMC5.1 in DT binding. > > changes in v3: > -> Split the 2/2 patch into two, created separate patch(3/3) to skip the > clock delay setting for 400KHz as suggested by Adrian Hunter. > > changes in v2: > -> 1/2 - Removed v5.1 from compatible string as suggested by Krzysztof. > > Sai Krishna Potthuri (2): > dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net compatible > mmc: sdhci-of-arasan: Skip setting clock delay for 400KHz > > Swati Agarwal (1): > mmc: sdhci-of-arasan: Add support for eMMC5.1 on Xilinx Versal Net > platform > > .../devicetree/bindings/mmc/arasan,sdhci.yaml | 5 + > drivers/mmc/host/sdhci-of-arasan.c | 237 +++++++++++++++++- > 2 files changed, 241 insertions(+), 1 deletion(-) > Applied for next, thanks! Kind regards Uffe