[v8,0/4] RISC-V Hibernation Support

Message ID 20230330064321.1008373-1-jeeheng.sia@starfivetech.com
Headers
Series RISC-V Hibernation Support |

Message

JeeHeng Sia March 30, 2023, 6:43 a.m. UTC
  This series adds RISC-V Hibernation/suspend to disk support.
Low level Arch functions were created to support hibernation.
swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write
cpu state onto the stack, then calling swsusp_save() to save the memory
image.

Arch specific hibernation header is implemented and is utilized by the
arch_hibernation_header_restore() and arch_hibernation_header_save()
functions. The arch specific hibernation header consists of satp, hartid,
and the cpu_resume address. The kernel built version is also need to be
saved into the hibernation image header to making sure only the same
kernel is restore when resume.

swsusp_arch_resume() creates a temporary page table that covering only
the linear map. It copies the restore code to a 'safe' page, then start to
restore the memory image. Once completed, it restores the original
kernel's page table. It then calls into __hibernate_cpu_resume()
to restore the CPU context. Finally, it follows the normal hibernation
path back to the hibernation core.

To enable hibernation/suspend to disk into RISCV, the below config
need to be enabled:
- CONFIG_HIBERNATION
- CONFIG_ARCH_HIBERNATION_HEADER
- CONFIG_ARCH_HIBERNATION_POSSIBLE

At high-level, this series includes the following changes:
1) Change suspend_save_csrs() and suspend_restore_csrs()
   to public function as these functions are common to
   suspend/hibernation. (patch 1)
2) Refactor the common code in the __cpu_resume_enter() function and
   __hibernate_cpu_resume() function. The common code are used by
   hibernation and suspend. (patch 2)
3) Enhance kernel_page_present() function to support huge page. (patch 3)
4) Add arch/riscv low level functions to support
   hibernation/suspend to disk. (patch 4)

The above patches are based on kernel v6.3-rc4 and have been tested on
StarFive VF2 SBC board and Qemu (using raw disk format). 
ACPI platform mode is not supported in this series.

Changes since v7:
- Rebased to kernel v6.3-rc4
- Added "select CPU_PM if CPU_IDLE || HIBERNATION" to arch/riscv/Kconfig

Changes since v6:
- Rebased to kernel v6.3-rc3
- Resolved nit

Changes since v5:
- Rebased to kernel v6.3-rc2
- Removed extra line at the commit msg
- Added comment to describe the reason to map the kernel address

Changes since v4:
- Rebased to kernel v6.3-rc1
- Resolved typo(s)
- Removed unnecessary helper function
- Removed unnecessary "addr" local variable
- Removed typecast of 'int'
- Used def_bool HIBERNATION
- Used "mv a0, zero" instead of "add a0, zero, zero"
- Make linear region as executable and writable when restoring the
  image

Changes since v3:
- Rebased to kernel v6.2
- Temporary page table code refactoring by reference to ARM64
- Resolved typo(s) and grammars
- Resolved documentation errors
- Resolved clang build issue
- Removed unnecessary comments
- Used kzalloc instead of kcalloc

Changes since v2:
- Rebased to kernel v6.2-rc5
- Refactor the common code used by hibernation and suspend
- Create copy_page macro
- Solved other comments from Andrew and Conor

Changes since v1:
- Rebased to kernel v6.2-rc3
- Fixed bot's compilation error

Sia Jee Heng (4):
  RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public
    function
  RISC-V: Factor out common code of __cpu_resume_enter()
  RISC-V: mm: Enable huge page support to kernel_page_present() function
  RISC-V: Add arch functions to support hibernation/suspend-to-disk

 arch/riscv/Kconfig                 |   8 +-
 arch/riscv/include/asm/assembler.h |  82 ++++++
 arch/riscv/include/asm/suspend.h   |  22 ++
 arch/riscv/kernel/Makefile         |   1 +
 arch/riscv/kernel/asm-offsets.c    |   5 +
 arch/riscv/kernel/hibernate-asm.S  |  77 ++++++
 arch/riscv/kernel/hibernate.c      | 427 +++++++++++++++++++++++++++++
 arch/riscv/kernel/suspend.c        |   4 +-
 arch/riscv/kernel/suspend_entry.S  |  34 +--
 arch/riscv/mm/pageattr.c           |   8 +
 10 files changed, 634 insertions(+), 34 deletions(-)
 create mode 100644 arch/riscv/include/asm/assembler.h
 create mode 100644 arch/riscv/kernel/hibernate-asm.S
 create mode 100644 arch/riscv/kernel/hibernate.c


base-commit: ffe78bbd512166e0ef1cc4858010b128c510ed7d
  

Comments

Conor Dooley March 30, 2023, 6:51 a.m. UTC | #1
On Thu, Mar 30, 2023 at 02:43:17PM +0800, Sia Jee Heng wrote:

> Changes since v7:
> - Rebased to kernel v6.3-rc4

BTW, there is absolutely no need to do this every time you resubmit.
Usually patches will either be applied to for-next or to -rc1, so
rebasing on the newest -rc is not needed :)
  
JeeHeng Sia March 31, 2023, 10:27 a.m. UTC | #2
> -----Original Message-----
> From: Conor Dooley <conor.dooley@microchip.com>
> Sent: Thursday, March 30, 2023 2:51 PM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>
> Cc: paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; linux-riscv@lists.infradead.org; linux-
> kernel@vger.kernel.org; Leyfoon Tan <leyfoon.tan@starfivetech.com>; Mason Huo <mason.huo@starfivetech.com>
> Subject: Re: [PATCH v8 0/4] RISC-V Hibernation Support
> 
> On Thu, Mar 30, 2023 at 02:43:17PM +0800, Sia Jee Heng wrote:
> 
> > Changes since v7:
> > - Rebased to kernel v6.3-rc4
> 
> BTW, there is absolutely no need to do this every time you resubmit.
> Usually patches will either be applied to for-next or to -rc1, so
> rebasing on the newest -rc is not needed :)
Noted with thanks! 😊 The reason why I update the kernel version with every resubmission is that I'm afraid the new release candidate might introduce something that I'm not aware of, which could potentially cause a break somewhere.
  
Palmer Dabbelt May 1, 2023, 10:44 p.m. UTC | #3
On Thu, 30 Mar 2023 14:43:17 +0800, Sia Jee Heng wrote:
> This series adds RISC-V Hibernation/suspend to disk support.
> Low level Arch functions were created to support hibernation.
> swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write
> cpu state onto the stack, then calling swsusp_save() to save the memory
> image.
> 
> Arch specific hibernation header is implemented and is utilized by the
> arch_hibernation_header_restore() and arch_hibernation_header_save()
> functions. The arch specific hibernation header consists of satp, hartid,
> and the cpu_resume address. The kernel built version is also need to be
> saved into the hibernation image header to making sure only the same
> kernel is restore when resume.
> 
> [...]

Applied, thanks!

[1/4] RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public function
      https://git.kernel.org/palmer/c/0def12f32129
[2/4] RISC-V: Factor out common code of __cpu_resume_enter()
      https://git.kernel.org/palmer/c/fcb89863d1b7
[3/4] RISC-V: mm: Enable huge page support to kernel_page_present() function
      https://git.kernel.org/palmer/c/a15c90b67a66
[4/4] RISC-V: Add arch functions to support hibernation/suspend-to-disk
      https://git.kernel.org/palmer/c/c0317210012e

Best regards,