mbox series

[RFC,0/7] Introduce a generic regmap-based MDIO driver

Message ID 20230324093644.464704-1-maxime.chevallier@bootlin.com
Headers
Series Introduce a generic regmap-based MDIO driver |

Message

Maxime Chevallier March 24, 2023, 9:36 a.m. UTC 
  Hello everyone,

When the Altera TSE PCS driver was initially introduced, there were
comments by Russell that the register layout looked very familiar to the
existing Lynx PCS driver, the only difference being that the TSE PCS
driver is memory-mapped whereas the Lynx PCS driver sits on an MDIO bus.

Since then, I've sent a followup to create a wrapper around Lynx, that
would create a virtual MDIO bus driver that would translate the mdio
operations to mmio operations [1].

Discussion ensued, and we agreed that we could make this more generic,
the idea being that this PCS isn't the only example of such a device,
that memory-maps an mdio-like register layout

Vladimir mentionned that some ocelot devices have the same kind of
problematic, but this time the devices sits on a SPI bus, exposing MDIO
registers.

This series therefore introduces a new "virtual" mdio driver, that would
translate MDIO accesses to an underlying regmap. That way, we can use
the whole phylink and phylib logic to configure the device (as phylink
interacts with mdiodevice's).

One issue encountered is that the MDIO registers have a stride of 1,
and we need to translate that to a higher stride for memory-mapped
devices. This is what the first 3 patches of this series do.

Then, patch 4 addresses a small inconsistency found in the only user of
regmap's reg_downshift.

Patch 5 introduces the new MDIO driver, while patch 6 makes use of it
by porting altera_tse to the Lynx PCS.

Finally patch 7 drops the TSE PCS driver, as it is no longer needed.

This series is a RFC as is still has a few shortcomings, but due to
various subsystems being involved, I'm sending it as a whole so that
reviewers can get a clear view of the big picture, the end-goal and the
various problems faces.

The existing shortcomings are :
 - The virtual MDIO bus driver can only have 1 mdio-device on it. If we
   have multiple ones that are memory-mapped onto the same range (with
   an offset, for example), we can't address them and we would have to
   create one such virtual bus driver per device. I don't know as of
   today if the problem will show-up for some users

 - With this series, we can also convert dwmac_socfpga to Lynx, but I've
   left this out for now

 - The renaming of regmap.format.reg_downshift to regmap.format.reg_shift
   can be confusing, as regmap.reg_shift also exists and has another
   meaning. I'm very bad at naming, so any suggestion is welcome.

Thanks,

Maxime

[1] : https://lore.kernel.org/all/20230210190949.1115836-1-maxime.chevallier@bootlin.com/

Maxime Chevallier (7):
  regmap: add a helper to translate the register address
  regmap: check for alignment on translated register addresses
  regmap: allow upshifting register addresses before performing
    operations
  mfd: ocelot-spi: Change the regmap stride to reflect the real one
  net: mdio: Introduce a regmap-based mdio driver
  net: ethernet: altera-tse: Convert to mdio-regmap and use PCS Lynx
  net: pcs: Drop the TSE PCS driver

 MAINTAINERS                                   |  14 +-
 drivers/base/regmap/internal.h                |   2 +-
 drivers/base/regmap/regmap.c                  |  55 +++---
 drivers/mfd/ocelot-spi.c                      |   4 +-
 drivers/net/ethernet/altera/altera_tse.h      |   1 +
 drivers/net/ethernet/altera/altera_tse_main.c |  54 +++++-
 drivers/net/mdio/Kconfig                      |  11 ++
 drivers/net/mdio/Makefile                     |   1 +
 drivers/net/mdio/mdio-regmap.c                |  85 ++++++++++
 drivers/net/pcs/Kconfig                       |   6 -
 drivers/net/pcs/Makefile                      |   1 -
 drivers/net/pcs/pcs-altera-tse.c              | 160 ------------------
 include/linux/mdio/mdio-regmap.h              |  25 +++
 include/linux/pcs-altera-tse.h                |  17 --
 include/linux/regmap.h                        |  15 +-
 15 files changed, 223 insertions(+), 228 deletions(-)
 create mode 100644 drivers/net/mdio/mdio-regmap.c
 delete mode 100644 drivers/net/pcs/pcs-altera-tse.c
 create mode 100644 include/linux/mdio/mdio-regmap.h
 delete mode 100644 include/linux/pcs-altera-tse.h

Comments

Mark Brown March 24, 2023, 8:37 p.m. UTC | #1 
On Fri, 24 Mar 2023 10:36:37 +0100, Maxime Chevallier wrote:
> When the Altera TSE PCS driver was initially introduced, there were
> comments by Russell that the register layout looked very familiar to the
> existing Lynx PCS driver, the only difference being that the TSE PCS
> driver is memory-mapped whereas the Lynx PCS driver sits on an MDIO bus.
> 
> Since then, I've sent a followup to create a wrapper around Lynx, that
> would create a virtual MDIO bus driver that would translate the mdio
> operations to mmio operations [1].
> 
> [...]

Applied to

   broonie/regmap.git for-next

Thanks!

[1/7] regmap: add a helper to translate the register address
      commit: 3f58f6dc4d92ed6fae4a4da0d5b091e00ec10fa8

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark