[0/2] Add few device nodes for IPQ5332 SoC

Message ID 20230320094450.8015-1-quic_kathirav@quicinc.com
Headers
Series Add few device nodes for IPQ5332 SoC |

Message

Kathiravan Thirumoorthy March 20, 2023, 9:44 a.m. UTC
  This series adds the support for QUP peripherals, PRNG, WDT for IPQ5332
SoC.

This series depends on the below patch, due to the node ordering
https://lore.kernel.org/linux-arm-msm/20230217083308.12017-6-quic_kathirav@quicinc.com/#t


Kathiravan T (2):
  dt-bindings: watchdog: qcom-wdt: add qcom,apss-wdt-ipq5332 compatible
  arm64: dts: qcom: ipq5332: add few device nodes

 .../bindings/watchdog/qcom-wdt.yaml           |  1 +
 arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts   | 14 ++++
 arch/arm64/boot/dts/qcom/ipq5332.dtsi         | 67 +++++++++++++++++++
 3 files changed, 82 insertions(+)
  

Comments

Krzysztof Kozlowski March 20, 2023, 10:18 a.m. UTC | #1
On 20/03/2023 10:44, Kathiravan T wrote:
> Add the nodes for QUP peripheral, PRNG and WDOG. While at it, enable the
> I2C device for MI01.2 board.
> 
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts | 14 +++++
>  arch/arm64/boot/dts/qcom/ipq5332.dtsi       | 67 +++++++++++++++++++++
>  2 files changed, 81 insertions(+)

Thank you for your patch. There is something to discuss/improve.

> +
>  		blsp1_uart0: serial@78af000 {
>  			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
>  			reg = <0x078af000 0x200>;
> @@ -201,6 +218,48 @@
>  			status = "disabled";
>  		};
>  
> +		blsp1_spi0: spi@78b5000 {
> +			compatible = "qcom,spi-qup-v2.2.1";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0x078b5000 0x600>;

Please keep the reg as second property, after compatible.


Best regards,
Krzysztof