Message ID | 20230315-topic-lagoon_gpu-v2-0-afcdfb18bb13@linaro.org |
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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id x1-20020ac25dc1000000b004f64b8eee61sm2088406lfq.97.2023.06.14.04.35.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 04:35:47 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH v2 0/7] SM6350 GPU Date: Wed, 14 Jun 2023 13:35:31 +0200 Message-Id: <20230315-topic-lagoon_gpu-v2-0-afcdfb18bb13@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAOmiWQC/32NWwqDMBAAryL5bopG+6BfvUeRstmucSFkQ6LSI t69qQfo5wwMs6pMiSmrW7WqRAtnllDAHCqFIwRHml+FlalNW7fNSU8SGbUHJxKeLs76igYsosU zWVUyC5m0TRBwLGGYvS8yJhr4vX8efeGR8yTps2+X5mf/HJZG1xouHVrCjnDAu+cASY6SnOq3b fsCrWAwX8YAAAA= To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>, Conor Dooley <conor+dt@kernel.org> Cc: Marijn Suijten <marijn.suijten@somainline.org>, Rob Herring <robh@kernel.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@somainline.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Luca Weiss <luca.weiss@fairphone.com> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686742545; l=1513; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Zj6EKpI9LyjJLvwEHwqcCLEiQUgWc1gxPnuUuffY2/g=; b=REH0Yu7DJoufQBzafbTcHqja8hly3sLq7yU4EtTvyEhzgxq8NBvoWzl8NYb8tCbLsdhZ18DMC w8tIAtoHF9HAmmKgKM7XJ15oATMACRjPgEMqkd9qG59bVTRgDlQOPWG X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768678972737163300?= X-GMAIL-MSGID: =?utf-8?q?1768678972737163300?= |
Series |
SM6350 GPU
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Message
Konrad Dybcio
June 14, 2023, 11:35 a.m. UTC
Add all the required nodes for SM6350's A619 and fix up its GPUCC
bindings.
This has been ready for like 1.5y now, time to finally merge it as
the display part will take some more time (due to the HW catalog rework).
Depends on (bindings, admittedly I could have organized it better):
https://lore.kernel.org/linux-arm-msm/20230314-topic-nvmem_compats-v1-0-508100c17603@linaro.org/#t
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Changes in v2:
- gpu_speed_bin@ -> gpu-speed-bin@ [3/5]
- Order GPU nodes properly [4/5]
- sort out the clock-names issue
- throw in the dpu patch, as the driver part has been finally merged
- pick up tags
- Link to v1: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org
---
Konrad Dybcio (7):
clk: qcom: gpucc-sm6350: Introduce index-based clk lookup
clk: qcom: gpucc-sm6350: Fix clock source names
arm64: dts: qcom: sm6350: Add GPUCC node
arm64: dts: qcom: sm6350: Add QFPROM node
arm64: dts: qcom: sm6350: Add GPU nodes
arm64: dts: qcom: sm6350: Fix ZAP region
arm64: dts: qcom: sm6350: Add DPU1 nodes
arch/arm64/boot/dts/qcom/sm6350.dtsi | 394 ++++++++++++++++++++++++++++++++++-
drivers/clk/qcom/gpucc-sm6350.c | 18 +-
2 files changed, 402 insertions(+), 10 deletions(-)
---
base-commit: b16049b21162bb649cdd8519642a35972b7910fe
change-id: 20230315-topic-lagoon_gpu-8c2abccbc6eb
Best regards,
Comments
On Wed, 14 Jun 2023 13:35:31 +0200, Konrad Dybcio wrote: > Add all the required nodes for SM6350's A619 and fix up its GPUCC > bindings. > > This has been ready for like 1.5y now, time to finally merge it as > the display part will take some more time (due to the HW catalog rework). > > Depends on (bindings, admittedly I could have organized it better): > https://lore.kernel.org/linux-arm-msm/20230314-topic-nvmem_compats-v1-0-508100c17603@linaro.org/#t > > [...] Applied, thanks! [3/7] arm64: dts: qcom: sm6350: Add GPUCC node commit: 75a511b1e5ff6ffadb9b51d85beee8c7bcc29ba9 [4/7] arm64: dts: qcom: sm6350: Add QFPROM node commit: 5b1e5d9a21ec2ad0654ce192371ed81b12088c6f [5/7] arm64: dts: qcom: sm6350: Add GPU nodes commit: bd9b767502806faccbac6f2c8db09d0ea6ca6e3e [6/7] arm64: dts: qcom: sm6350: Fix ZAP region commit: 44bcded2be4fe9b9d0b6e48075c9947b75c0af63 [7/7] arm64: dts: qcom: sm6350: Add DPU1 nodes commit: 26c71d31f8be3493006140961acf6be204004fdb Best regards,