mbox series

[v5,0/9] arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs

Message ID 20230309103752.173541-1-brgl@bgdev.pl
Headers
Series arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs |

Message

Bartosz Golaszewski March 9, 2023, 10:37 a.m. UTC 
  From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

This enables the QUPv3 interfaces that are exposed on the sa8775p-ride
board: I2C, SPI and the Bluetooth and GNSS UART ports.

v4 -> v5:
- remove board-specific interrupt from UART17 in SoC dtsi
- rearrange node properties to have various *-cells properties come right
  before status
- collect more tags

v3 -> v4:
- use interconnect constants instead of magic numbers where applicable
- pad addresses in reg to 8 digits
- group pins under state nodes for UART

v2 -> v3:
- fix the interrupt number for uart12
- replace underscores with hyphens in DT node names (although make dtbs_check
  does not raise warnings about this)
- rearrange the commits so that they're more fine-grained with separate
  patches for adding nodes to dtsi and enabling them for the board

v1 -> v2:
- uart17 is the Bluetooth port, not GNSS
- add uart12 for GNSS too in that case

Bartosz Golaszewski (9):
  arm64: dts: qcom: sa8775p: add the QUPv3 #2 node
  arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2
  arm64: dts: qcom: sa8775p: add the i2c18 node
  arm64: dts: qcom: sa8775p-ride: enable i2c18
  arm64: dts: qcom: sa8775p: add the spi16 node
  arm64: dts: qcom: sa8775p-ride: enable the SPI node
  arm64: dts: qcom: sa8775p: add high-speed UART nodes
  arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port
  arm64: dts: qcom: sa8775p-ride: enable the BT UART port

 arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 99 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sa8775p.dtsi     | 86 ++++++++++++++++++++
 2 files changed, 185 insertions(+)

Comments

Bartosz Golaszewski March 16, 2023, 2:48 p.m. UTC | #1 
On Thu, Mar 9, 2023 at 11:37 AM Bartosz Golaszewski <brgl@bgdev.pl> wrote:
>
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>
> This enables the QUPv3 interfaces that are exposed on the sa8775p-ride
> board: I2C, SPI and the Bluetooth and GNSS UART ports.
>
> v4 -> v5:
> - remove board-specific interrupt from UART17 in SoC dtsi
> - rearrange node properties to have various *-cells properties come right
>   before status
> - collect more tags
>
> v3 -> v4:
> - use interconnect constants instead of magic numbers where applicable
> - pad addresses in reg to 8 digits
> - group pins under state nodes for UART
>
> v2 -> v3:
> - fix the interrupt number for uart12
> - replace underscores with hyphens in DT node names (although make dtbs_check
>   does not raise warnings about this)
> - rearrange the commits so that they're more fine-grained with separate
>   patches for adding nodes to dtsi and enabling them for the board
>
> v1 -> v2:
> - uart17 is the Bluetooth port, not GNSS
> - add uart12 for GNSS too in that case
>
> Bartosz Golaszewski (9):
>   arm64: dts: qcom: sa8775p: add the QUPv3 #2 node
>   arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2
>   arm64: dts: qcom: sa8775p: add the i2c18 node
>   arm64: dts: qcom: sa8775p-ride: enable i2c18
>   arm64: dts: qcom: sa8775p: add the spi16 node
>   arm64: dts: qcom: sa8775p-ride: enable the SPI node
>   arm64: dts: qcom: sa8775p: add high-speed UART nodes
>   arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port
>   arm64: dts: qcom: sa8775p-ride: enable the BT UART port
>
>  arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 99 +++++++++++++++++++++++
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi     | 86 ++++++++++++++++++++
>  2 files changed, 185 insertions(+)
>
> --
> 2.37.2
>

Bjorn,

I noticed you're picking up the reviewed patches. :) This series seems
ready to go into your tree as well.

Thanks in advance,
Bartosz
Bjorn Andersson March 22, 2023, 2:45 p.m. UTC | #2 
On Thu, 9 Mar 2023 11:37:43 +0100, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> 
> This enables the QUPv3 interfaces that are exposed on the sa8775p-ride
> board: I2C, SPI and the Bluetooth and GNSS UART ports.
> 
> v4 -> v5:
> - remove board-specific interrupt from UART17 in SoC dtsi
> - rearrange node properties to have various *-cells properties come right
>   before status
> - collect more tags
> 
> [...]

Applied, thanks!

[1/9] arm64: dts: qcom: sa8775p: add the QUPv3 #2 node
      commit: dc3ad22112de7fe76352ef2aa2943b62eb1836a3
[2/9] arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2
      commit: 4926a8e93f321760fa265f91d78aa2a2163e222b
[3/9] arm64: dts: qcom: sa8775p: add the i2c18 node
      commit: a23d122572a4ad1292e60d4a87e6f0238aaa0505
[4/9] arm64: dts: qcom: sa8775p-ride: enable i2c18
      commit: 12f35f74ad6da53d94fcbc1bbb2adff60b31a71f
[5/9] arm64: dts: qcom: sa8775p: add the spi16 node
      commit: cfd975f588400e0942d55dc4bb84c12c6f217fb4
[6/9] arm64: dts: qcom: sa8775p-ride: enable the SPI node
      commit: a3b31b0e0f76326bfa4bc81577f52738ad8e072b
[7/9] arm64: dts: qcom: sa8775p: add high-speed UART nodes
      commit: 41ae5ca448c21a82a2f07e10954b043a0d45a811
[8/9] arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port
      commit: 4b6c4249069694a593f3b4c3d81c75a5053b7693
[9/9] arm64: dts: qcom: sa8775p-ride: enable the BT UART port
      commit: e1988af7a646aafe8075b179c00fd8053ced2add

Best regards,