From patchwork Tue Feb 21 03:46:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cai Huoqing X-Patchwork-Id: 5660 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp1655585wrn; Mon, 20 Feb 2023 19:49:54 -0800 (PST) X-Google-Smtp-Source: AK7set/3shcCDEqt73F+2j6HB03WRUX/HNfJm2tbQMV/tByQa2iY4I5MztAmksTL7VFsS4gezOLo X-Received: by 2002:a17:906:5acb:b0:889:1eb1:7517 with SMTP id x11-20020a1709065acb00b008891eb17517mr10084821ejs.30.1676951394720; Mon, 20 Feb 2023 19:49:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676951394; cv=none; d=google.com; s=arc-20160816; b=LELn0u8yO6uCeV0aYRGcDnX/b7VPSksyy7kl5hbQmJ354g5A+1N+q/bp305s5vVQjA DqUcz0iSgDg7g/K97ZD/YuumbhdXWtTKmtRUVuxPEvOgVz+37oJoehfPX+uhB0v+Xrui hNmApVOu49+yay87eM0/jfRCbmL2zlF726YLZwcPwfY8bfcPpbJ/yAa/iRKN3Q+58s2A K0zlts5nA+Bda1AifgJ+00JwzutMnQ2v4lL6Ur+4602rIWaTy++LtTNOBTgnerdZN+ef E5CMSkb/BwhkEpxeapUvEds60fcST1UjP0ZjXds4ryGTLks6h2jXDM/YGNDLXpLM+n99 oNHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=glhrY5x814R+m/N+0kgmuOwwASDPjGlBa+He80uRzD0=; b=tOc6JgiWhZBnDj+adQngRgdZiiWI4Mm5TQ6CZl2SIh4qbrLjBNVP6vqera0lAApjjG 1Llt9f6MbQNiA5YbCyjLqJfH2mab65p+SX3z1PSbRCYtM0K72/m1Rg6tmOHcPcrTagSc XS8aGagRLZg6gGGy4Z8jf1z/7qvCXvtnODKnbWxTydVZHz1zUyJwvesiyXNYFoqoCo+f B97g3Kmj4ulNVCdM1ihi033RZG9RJ0jwhX15w8RuNgOIm6tf8V0WZNBc5RuTYfGJOK6S YdoEUwgqyoC3oVXAolj5QZJvDHzLY3L5SVFiEa3ziQND98kTKB96UfE4afFeyzJUVcS3 PAdw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linux.dev header.s=key1 header.b=Hlsl71ou; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linux.dev Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 29-20020a170906101d00b008b2c034ca3csi13587145ejm.237.2023.02.20.19.49.31; Mon, 20 Feb 2023 19:49:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linux.dev header.s=key1 header.b=Hlsl71ou; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linux.dev Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233299AbjBUDrH (ORCPT + 99 others); Mon, 20 Feb 2023 22:47:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232317AbjBUDrF (ORCPT ); Mon, 20 Feb 2023 22:47:05 -0500 Received: from out-32.mta0.migadu.com (out-32.mta0.migadu.com [IPv6:2001:41d0:1004:224b::20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADA85CA29 for ; Mon, 20 Feb 2023 19:47:04 -0800 (PST) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1676951222; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=glhrY5x814R+m/N+0kgmuOwwASDPjGlBa+He80uRzD0=; b=Hlsl71ou3UkEfNUJwgG+LPhlN4BFIigHfrHpXC7jLWKaeBossmpaprs+4gk46kw+KjHPqU HAT3ujW7DRv5T4frcxJwx6DmMYJBDdIByQTyfYuRO5k9fwqykiEoj4t77vy6KqLXxvw+NA X9/rooCkg220pMEHM5SkquoiQWr/yu0= From: Cai Huoqing To: fancer.lancer@gmail.com Cc: Cai Huoqing , Gustavo Pimentel , Vinod Koul , Jingoo Han , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v4 0/4] dmaengine: dw-edma: Add support for native HDMA Date: Tue, 21 Feb 2023 11:46:51 +0800 Message-Id: <20230221034656.14476-1-cai.huoqing@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1758410965770905986?= X-GMAIL-MSGID: =?utf-8?q?1758410985505291003?= Add support for HDMA NATIVE, as long the IP design has set the compatible register map parameter-HDMA_NATIVE, which allows compatibility for native HDMA register configuration. The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP. And the native HDMA registers are different from eDMA, so this patch add support for HDMA NATIVE mode. HDMA write and read channels operate independently to maximize the performance of the HDMA read and write data transfer over the link When you configure the HDMA with multiple read channels, then it uses a round robin (RR) arbitration scheme to select the next read channel to be serviced.The same applies when youhave multiple write channels. The native HDMA driver also supports a maximum of 16 independent channels (8 write + 8 read), which can run simultaneously. Both SAR (Source Address Register) and DAR (Destination Address Register) are aligned to byte. Cai huoqing (4): dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops dmaengine: dw-edma: Create a new dw_edma_core_ops structure to abstract controller operation dmaengine: dw-edma: Add support for native HDMA dmaengine: dw-edma: Add HDMA DebugFS support v3->v4: [1/4] 1.Update the structure name dw_edma_plat_ops in commit log 2.Fix code stytle. [2/4] 3.Refactor dw_edma_interrupt() and related callbacks to make the code more readable, the calls hierarchy like this: irq: dw_edma_interrupt_{write,read}() +-> dw_edma_core_handle_int() (dw-edma-v0-core.c) +-> dw_edma_v0_core_status_done_int() (dw-edma-v0-core.c) +-> dw_edma_v0_core_clear_done_int() (dw-edma-v0-core.c) +-> dw_edma_done_interrupt() (dw-edma-core.c) +-> dw_edma_v0_core_status_abort_int() (dw-edma-v0-core.c) +-> dw_edma_v0_core_clear_abort_int() (dw-edma-v0-core.c) +-> dw_edma_abort_interrupt() (dw-edma-core.c) 4.Use the dw_edma_v0_core name for the dw_edma_core_ops structure instance. [3/4] 5.Fix weird indentation of control1, func_num, etc. 6.Include 'linux/io-64-nonatomic-lo-hi.h' to fix warning. 7.Refactor dw_edma_core_handle_int related callback in dw_hdma_v0_core ops. [4/4] 8.Add field watermark_en, func_num, qos, msi_watermark,etc. 9.Make variables reverse xmas tree order. 10.Declare const for 'struct dw_hdma_debugfs_entry' v3 link: https://lore.kernel.org/lkml/20230213132411.65524-1-cai.huoqing@linux.dev/ drivers/dma/dw-edma/Makefile | 8 +- drivers/dma/dw-edma/dw-edma-core.c | 77 ++--- drivers/dma/dw-edma/dw-edma-core.h | 56 ++++ drivers/dma/dw-edma/dw-edma-pcie.c | 4 +- drivers/dma/dw-edma/dw-edma-v0-core.c | 73 ++++- drivers/dma/dw-edma/dw-edma-v0-core.h | 14 +- drivers/dma/dw-edma/dw-hdma-v0-core.c | 302 +++++++++++++++++++ drivers/dma/dw-edma/dw-hdma-v0-core.h | 17 ++ drivers/dma/dw-edma/dw-hdma-v0-debugfs.c | 181 +++++++++++ drivers/dma/dw-edma/dw-hdma-v0-debugfs.h | 22 ++ drivers/dma/dw-edma/dw-hdma-v0-regs.h | 129 ++++++++ drivers/pci/controller/dwc/pcie-designware.c | 2 +- include/linux/dma/edma.h | 7 +- 13 files changed, 807 insertions(+), 85 deletions(-) create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h