mbox series

[v3,0/4] dmaengine: dw-edma: Add support for native HDMA

Message ID 20230213132411.65524-1-cai.huoqing@linux.dev
Headers
Series dmaengine: dw-edma: Add support for native HDMA |

Message

Cai Huoqing Feb. 13, 2023, 1:24 p.m. UTC 
  From: Cai huoqing <cai.huoqing@linux.dev>

Add support for HDMA NATIVE, as long the IP design has set
the compatible register map parameter-HDMA_NATIVE,
which allows compatibility for native HDMA register configuration.

The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP.
And the native HDMA registers are different from eDMA,
so this patch add support for HDMA NATIVE mode.

HDMA write and read channels operate independently to maximize
the performance of the HDMA read and write data transfer over
the link When you configure the HDMA with multiple read channels,
then it uses a round robin (RR) arbitration scheme to select
the next read channel to be serviced.
The same applies when you have multiple write channels.

The native HDMA driver also supports a maximum of 16 independent
channels (8 write + 8 read), which can run simultaneously.
Both SAR (Source Address Register) and DAR (Destination Address Register)
are alignmented to byte.dmaengine: dw-edma: Add support for native HDMA

Cai huoqing (4):
  dmaengine: dw-edma: Rename dw_edma_core_ops structure to
    dw_edma_plat_ops
  dmaengine: dw-edma: Create a new dw_edma_core_ops structure to
    abstract controller operation
  dmaengine: dw-edma: Add support for native HDMA
  dmaengine: dw-edma: Add HDMA DebugFS support

  v2->v3:
    [1/4]
    1.Add more commit log to explain why use dw_edma_plat_ops.
    2.Update the structure name in the DW PCIe driver.
    [2/4]
    3.Use the reverse xmas tree vars definition order.
    4.Add edma core ops wrapper.
    5.Add dw_edma_done_interrupt() and dw_edma_abort_interrupt()
      global methods.
    6.Fix some indentation.
    7.Fix some typo
    8.Make use off dw_edma_core prefix instead of dw_xdma_core_.
    [3/4]
    9.Remove unnecessary include: dw-edma-v0-regs.h and dw-edma-v0-regs.h
    10.HDMA supports the LL descriptors placed on the CPU memory.
    [4/4]
    11.Split DebugFS to be a separate patch.
    12.Refactor HDMA DebugFS like the series in @Bjorn tree.

  v2 link:
  https://lore.kernel.org/lkml/20220925173412.u2ez6rbmfc5fupdn@mobilestation/

 drivers/dma/dw-edma/Makefile                 |   8 +-
 drivers/dma/dw-edma/dw-edma-core.c           |  63 ++--
 drivers/dma/dw-edma/dw-edma-core.h           |  92 ++++++
 drivers/dma/dw-edma/dw-edma-pcie.c           |   4 +-
 drivers/dma/dw-edma/dw-edma-v0-core.c        |  88 ++++-
 drivers/dma/dw-edma/dw-edma-v0-core.h        |  14 +-
 drivers/dma/dw-edma/dw-hdma-v0-core.c        | 317 +++++++++++++++++++
 drivers/dma/dw-edma/dw-hdma-v0-core.h        |  17 +
 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c     | 175 ++++++++++
 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h     |  22 ++
 drivers/dma/dw-edma/dw-hdma-v0-regs.h        | 129 ++++++++
 drivers/pci/controller/dwc/pcie-designware.c |   2 +-
 include/linux/dma/edma.h                     |   7 +-
 13 files changed, 860 insertions(+), 78 deletions(-)
 create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c
 create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h
 create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
 create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h
 create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h

Comments

Cai Huoqing Feb. 16, 2023, 2:08 a.m. UTC | #1 
On 13 2月 23 21:24:05, Cai Huoqing wrote:
> From: Cai huoqing <cai.huoqing@linux.dev>
> 
> Add support for HDMA NATIVE, as long the IP design has set
> the compatible register map parameter-HDMA_NATIVE,
> which allows compatibility for native HDMA register configuration.
> 
> The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP.
> And the native HDMA registers are different from eDMA,
> so this patch add support for HDMA NATIVE mode.
> 
> HDMA write and read channels operate independently to maximize
> the performance of the HDMA read and write data transfer over
> the link When you configure the HDMA with multiple read channels,
> then it uses a round robin (RR) arbitration scheme to select
> the next read channel to be serviced.
> The same applies when you have multiple write channels.
> 
> The native HDMA driver also supports a maximum of 16 independent
> channels (8 write + 8 read), which can run simultaneously.
> Both SAR (Source Address Register) and DAR (Destination Address Register)
> are alignmented to byte.dmaengine: dw-edma: Add support for native HDMA
> 
> Cai huoqing (4):
>   dmaengine: dw-edma: Rename dw_edma_core_ops structure to
>     dw_edma_plat_ops
>   dmaengine: dw-edma: Create a new dw_edma_core_ops structure to
>     abstract controller operation
>   dmaengine: dw-edma: Add support for native HDMA
>   dmaengine: dw-edma: Add HDMA DebugFS support
> 
>   v2->v3:
>     [1/4]
>     1.Add more commit log to explain why use dw_edma_plat_ops.
>     2.Update the structure name in the DW PCIe driver.
>     [2/4]
>     3.Use the reverse xmas tree vars definition order.
>     4.Add edma core ops wrapper.
>     5.Add dw_edma_done_interrupt() and dw_edma_abort_interrupt()
>       global methods.
>     6.Fix some indentation.
>     7.Fix some typo
>     8.Make use off dw_edma_core prefix instead of dw_xdma_core_.
>     [3/4]
>     9.Remove unnecessary include: dw-edma-v0-regs.h and dw-edma-v0-regs.h
>     10.HDMA supports the LL descriptors placed on the CPU memory.
>     [4/4]
>     11.Split DebugFS to be a separate patch.
>     12.Refactor HDMA DebugFS like the series in @Bjorn tree.
> 
>   v2 link:
>   https://lore.kernel.org/lkml/20220925173412.u2ez6rbmfc5fupdn@mobilestation/
Hi Sergey,

  Could you please give some comments for this patch v3

Thanks,
Cai
> 
>  drivers/dma/dw-edma/Makefile                 |   8 +-
>  drivers/dma/dw-edma/dw-edma-core.c           |  63 ++--
>  drivers/dma/dw-edma/dw-edma-core.h           |  92 ++++++
>  drivers/dma/dw-edma/dw-edma-pcie.c           |   4 +-
>  drivers/dma/dw-edma/dw-edma-v0-core.c        |  88 ++++-
>  drivers/dma/dw-edma/dw-edma-v0-core.h        |  14 +-
>  drivers/dma/dw-edma/dw-hdma-v0-core.c        | 317 +++++++++++++++++++
>  drivers/dma/dw-edma/dw-hdma-v0-core.h        |  17 +
>  drivers/dma/dw-edma/dw-hdma-v0-debugfs.c     | 175 ++++++++++
>  drivers/dma/dw-edma/dw-hdma-v0-debugfs.h     |  22 ++
>  drivers/dma/dw-edma/dw-hdma-v0-regs.h        | 129 ++++++++
>  drivers/pci/controller/dwc/pcie-designware.c |   2 +-
>  include/linux/dma/edma.h                     |   7 +-
>  13 files changed, 860 insertions(+), 78 deletions(-)
>  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c
>  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h
>  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
>  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h
>  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h
> 
> -- 
> 2.34.1
>
Serge Semin Feb. 16, 2023, 8:56 a.m. UTC | #2 
Hi Cai

On Thu, Feb 16, 2023 at 10:08:56AM +0800, Cai Huoqing wrote:
> On 13 2月 23 21:24:05, Cai Huoqing wrote:
> > From: Cai huoqing <cai.huoqing@linux.dev>
> > 
> > Add support for HDMA NATIVE, as long the IP design has set
> > the compatible register map parameter-HDMA_NATIVE,
> > which allows compatibility for native HDMA register configuration.
> > 
> > The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP.
> > And the native HDMA registers are different from eDMA,
> > so this patch add support for HDMA NATIVE mode.
> > 
> > HDMA write and read channels operate independently to maximize
> > the performance of the HDMA read and write data transfer over
> > the link When you configure the HDMA with multiple read channels,
> > then it uses a round robin (RR) arbitration scheme to select
> > the next read channel to be serviced.
> > The same applies when you have multiple write channels.
> > 
> > The native HDMA driver also supports a maximum of 16 independent
> > channels (8 write + 8 read), which can run simultaneously.
> > Both SAR (Source Address Register) and DAR (Destination Address Register)
> > are alignmented to byte.dmaengine: dw-edma: Add support for native HDMA
> > 
> > Cai huoqing (4):
> >   dmaengine: dw-edma: Rename dw_edma_core_ops structure to
> >     dw_edma_plat_ops
> >   dmaengine: dw-edma: Create a new dw_edma_core_ops structure to
> >     abstract controller operation
> >   dmaengine: dw-edma: Add support for native HDMA
> >   dmaengine: dw-edma: Add HDMA DebugFS support
> > 
> >   v2->v3:
> >     [1/4]
> >     1.Add more commit log to explain why use dw_edma_plat_ops.
> >     2.Update the structure name in the DW PCIe driver.
> >     [2/4]
> >     3.Use the reverse xmas tree vars definition order.
> >     4.Add edma core ops wrapper.
> >     5.Add dw_edma_done_interrupt() and dw_edma_abort_interrupt()
> >       global methods.
> >     6.Fix some indentation.
> >     7.Fix some typo
> >     8.Make use off dw_edma_core prefix instead of dw_xdma_core_.
> >     [3/4]
> >     9.Remove unnecessary include: dw-edma-v0-regs.h and dw-edma-v0-regs.h
> >     10.HDMA supports the LL descriptors placed on the CPU memory.
> >     [4/4]
> >     11.Split DebugFS to be a separate patch.
> >     12.Refactor HDMA DebugFS like the series in @Bjorn tree.
> > 
> >   v2 link:
> >   https://lore.kernel.org/lkml/20220925173412.u2ez6rbmfc5fupdn@mobilestation/

> Hi Sergey,
> 
>   Could you please give some comments for this patch v3

The series has landed in my inbox. I'll give you some comments shortly
today or tomorrow.

-Serge(y)

> 
> Thanks,
> Cai
> > 
> >  drivers/dma/dw-edma/Makefile                 |   8 +-
> >  drivers/dma/dw-edma/dw-edma-core.c           |  63 ++--
> >  drivers/dma/dw-edma/dw-edma-core.h           |  92 ++++++
> >  drivers/dma/dw-edma/dw-edma-pcie.c           |   4 +-
> >  drivers/dma/dw-edma/dw-edma-v0-core.c        |  88 ++++-
> >  drivers/dma/dw-edma/dw-edma-v0-core.h        |  14 +-
> >  drivers/dma/dw-edma/dw-hdma-v0-core.c        | 317 +++++++++++++++++++
> >  drivers/dma/dw-edma/dw-hdma-v0-core.h        |  17 +
> >  drivers/dma/dw-edma/dw-hdma-v0-debugfs.c     | 175 ++++++++++
> >  drivers/dma/dw-edma/dw-hdma-v0-debugfs.h     |  22 ++
> >  drivers/dma/dw-edma/dw-hdma-v0-regs.h        | 129 ++++++++
> >  drivers/pci/controller/dwc/pcie-designware.c |   2 +-
> >  include/linux/dma/edma.h                     |   7 +-
> >  13 files changed, 860 insertions(+), 78 deletions(-)
> >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c
> >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h
> >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
> >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h
> >  create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h
> > 
> > -- 
> > 2.34.1
> >