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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z88-20020a17090a6d6100b00230ac621520si4393563pjj.65.2023.02.10.02.24.02; Fri, 10 Feb 2023 02:24:14 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231923AbjBJKJO (ORCPT <rfc822;ybw1215001957@gmail.com> + 99 others); Fri, 10 Feb 2023 05:09:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231673AbjBJKJK (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 10 Feb 2023 05:09:10 -0500 Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BEE4C36689 for <linux-kernel@vger.kernel.org>; Fri, 10 Feb 2023 02:09:08 -0800 (PST) Received: from loongson.cn (unknown [113.200.148.30]) by gateway (Coremail) with SMTP id _____8AxHuvDF+ZjdcYQAA--.33346S3; Fri, 10 Feb 2023 18:09:07 +0800 (CST) Received: from localhost.localdomain (unknown [113.200.148.30]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxHuTDF+ZjXFIwAA--.54176S2; Fri, 10 Feb 2023 18:09:07 +0800 (CST) From: Qing Zhang <zhangqing@loongson.cn> To: Huacai Chen <chenhuacai@kernel.org>, Oleg Nesterov <oleg@redhat.com>, WANG Xuerui <kernel@xen0n.name> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/3] LoongArch: Add hardware breakpoints/watchpoints support Date: Fri, 10 Feb 2023 18:09:03 +0800 Message-Id: <20230210100906.16169-1-zhangqing@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8AxHuTDF+ZjXFIwAA--.54176S2 X-CM-SenderInfo: x2kd0wptlqwqxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBjvJXoWxZry8uw1DKF1fKF4fAr13urg_yoW5GF1UpF ZIkrn5Kr4DKrW3Zwsxtw48urn3GF1xCrW2qa17A34YywnFqr1Fvrn3KryDXa43J3yfJry0 qr1rWw1Fga4UZaUanT9S1TB71UUUUUJqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b3xYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jrv_JF1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26F4UJVW0owAa w2AFwI0_Jrv_JF1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44 I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2 jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwCFI7km07C267AKxVWUXVWUAwC20s02 6c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF 0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvE c7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14 v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7I U8CksDUUUUU== X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757439228962243502?= X-GMAIL-MSGID: =?utf-8?q?1757439228962243502?= |
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LoongArch: Add hardware breakpoints/watchpoints support
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Message
Qing Zhang
Feb. 10, 2023, 10:09 a.m. UTC
Use perf framework to manage hardware instruction and data breakpoints. LoongArch defines hardware watchpoint functions for instruction fetch and load/store operations, after the software configures hardware watchpoints for instruction fetch and load/store operations. The processor hardware will monitor the access address of the instruction fetch and load/store operation, and will trigger the exception of the watchpoint when it meets the conditions set by the watchpoint. The hardware monitoring points for instruction fetching and load/store operations each have a register for the overall configuration of all monitoring points, a register for recording the status of all monitoring points, and four registers required for configuration of each watchpoint individually. Watchpoint related control status register chapters: https://github.com/loongson/LoongArch-Documentation/releases/download/2022.08.12/ LoongArch-Vol1-v1.02-CN.pdf Initial version has the following limitations: - no support for virtualization Can be tested: e.g. 1. see samples/hw_breakpoint and register_wide_hw_breakpoint. 2. ptrace(PTRACE_SINGLESTEP/..., pid, NULL, NULL) 3. ptrace (PTRACE_SETREGSET, tid, ... , ...) TODO: - Add hardware breakpoints/watchpoints for gdb, kgdb Changes v1 -> v2: Suggested by Huacai: - Use irqentry_enter()/irqentry_exit() instead of exception_enter()/exception_exit() - Add ptrace interface to expose hw-breakpoints to debuggers - Use 2022-2023. - Some other changes. Qing Zhang (3): LoongArch: Add hardware breakpoints/watchpoints support LoongArch: Add ptrace single step support LoongArch: ptrace: expose hardware breakpoints to debuggers arch/loongarch/Kconfig | 1 + arch/loongarch/include/asm/hw_breakpoint.h | 145 ++++++ arch/loongarch/include/asm/loongarch.h | 32 +- arch/loongarch/include/asm/processor.h | 11 +- arch/loongarch/include/asm/ptrace.h | 2 + arch/loongarch/include/asm/switch_to.h | 1 + arch/loongarch/include/uapi/asm/ptrace.h | 9 + arch/loongarch/kernel/Makefile | 1 + arch/loongarch/kernel/hw_breakpoint.c | 540 +++++++++++++++++++++ arch/loongarch/kernel/process.c | 7 + arch/loongarch/kernel/ptrace.c | 484 ++++++++++++++++++ arch/loongarch/kernel/traps.c | 27 +- include/uapi/linux/elf.h | 2 + 13 files changed, 1241 insertions(+), 21 deletions(-) create mode 100644 arch/loongarch/include/asm/hw_breakpoint.h create mode 100644 arch/loongarch/kernel/hw_breakpoint.c