From patchwork Wed Feb 8 10:45:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 5125 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp3381628wrn; Wed, 8 Feb 2023 02:48:06 -0800 (PST) X-Google-Smtp-Source: AK7set+NiGglRJyftGbHAgYbOMHAWfCaktXMPblGn1/IPYGOHROyTrl+/FcRHpN2SU3Cs5kzWPCE X-Received: by 2002:a17:906:2085:b0:8aa:a9df:b7f0 with SMTP id 5-20020a170906208500b008aaa9dfb7f0mr5215008ejq.7.1675853286068; Wed, 08 Feb 2023 02:48:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675853286; cv=none; d=google.com; s=arc-20160816; b=ilDvqp+NkwZqLjeM29CxoBG+O64PWLMK9Y5xTk/piwk06/qpm0eFbabUggheVbV/51 FsiKCRm3d4A9yuaPOoz77/RuM7mic/juEM1cg1VtnuQRje+RFoBrn1nNkVzLPS8Tw9Tb E2aXelEVIsIUJcGSM355Zdstfyte5EVe21ul+hIoeEYe0NEC4vjekfeiboI5NK9Msx+V TVrAl8uLIJY5iNukZZquUswaJuBGy9PDgc/xzJgF8y9ZC3Ve++aa86NF9gI0reQtYWGK FgKYv9gkeXU1LoaosgK1l8QyvGyRHKh/jV9rPBCo1peo30iJ7PoUWxPCES/VV8U2P5bQ hpmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=EO+NLwX2w2NatVYeBgn4R1GH8kPQ175lSUdwZOXPeE0=; b=kX2ooIoR7rLuz7Pw7iUCl9LH2ICGR5y8rDFvbiYuPXZFIy6Fn5wJV0soI9EQed8hE/ c66H7MFiXu8eFneGKFziNdkx4WGsAzDCasl2a6dCZ76BqDkH1ziNBQseYaiPKaa+6zkA VnywbYO9RhNH6Af49UfB/0krkXkGob70YcT/Hh9RIliQlovDkJgdmUbnrZxkzQAmO45U 2MQvUI4BuLWQnI26mxPp1G1EV/L1rzJ3Eep0rkDzHAGREN7o8e0ptrfklTTt4VRUmIxs 3iAJ0nEJFb2IWMHDcHe+zcuqZrl1rIKpXKmj7rXsfbfIQMyzcRxPJJe89IXPvGo/N2CD LYxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="VT/PW6Gq"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h22-20020a17090791d600b008888f4120basi17361848ejz.688.2023.02.08.02.47.43; Wed, 08 Feb 2023 02:48:06 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="VT/PW6Gq"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229962AbjBHKpw (ORCPT + 99 others); Wed, 8 Feb 2023 05:45:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229923AbjBHKpu (ORCPT ); Wed, 8 Feb 2023 05:45:50 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A1B1474FD; Wed, 8 Feb 2023 02:45:36 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id B383F6600367; Wed, 8 Feb 2023 10:45:34 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853135; bh=uxPBG5wQOa/bUqDK+jm9zu3nY4u+VWE1I9KLBAJ3fa4=; h=From:To:Cc:Subject:Date:From; b=VT/PW6GqHaG/DJ/magsDCyA/W/UEvZAxKw1pcVzibaPfkjdUhXbTOTSqVGW2nVSTl TFr6/MSkzJ7L+P9YMEb7zy7z9sCOL0u1koKn+tKMHOUCcmujoo1t2fJf6Zr60YiHhb hOPDb0c/723YkyaD9ISwyxkxOR9LvppolJAfT8orW6hdE2TAdO7ffYnP9YY7Ti0YJ5 da4DcPM3aNiKVOjWIAvPhJvikPjHeAnZwzN+MfmeNJuKqoV22rX4B/+InAR45Z6VBC d2Ue2pImpkdsTyVP9c2qY4dQDRcp5Mv1/f3IFafqy1LBYtjQ05YFKMmkBYCl2ykL3i g7BuF2fl9AbJQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 00/16] Enable GPU with DVFS support on MediaTek SoCs Date: Wed, 8 Feb 2023 11:45:11 +0100 Message-Id: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1757259535116803749?= X-GMAIL-MSGID: =?utf-8?q?1757259535116803749?= We finally have working GPU DVFS on MediaTek SoCs. On Panfrost. For real. ...and the best part is that it's going upstream. In order to get GPU DVFS working, it was necessary to satisfy a specific constraint (which is different, depending on the SoC) between two regulators: GPU VCORE and GPU SRAM. This was done through adding the mtk-regulator-coupler driver, which transparently manages the voltage relation between these two vregs, hence completely eliminating the need to manage these regulators in the Panfrost driver; this solves the long standing issue with devfreq+opp tables not supporting managing voltages for two regulators per opp entry out of the box, due to which we never got GPU DVFS on those SoCs, often locking them out to a low GPU frequency. This changes. Right now! Tested on MT8192, MT8195 Chromebooks. This series depends on [1]. [1]: https://lore.kernel.org/lkml/20230208103709.116896-1-angelogioacchino.delregno@collabora.com/ Alyssa Rosenzweig (2): arm64: dts: mediatek: mt8192: Add GPU nodes arm64: dts: mediatek: mt8192-asurada: Enable GPU AngeloGioacchino Del Regno (13): arm64: dts: mediatek: mt8183-kukui: Couple VGPU and VSRAM_GPU regulators arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu constraints arm64: dts: mediatek: mt8183: Remove second opp-microvolt entries from gpu table arm64: dts: mt8183-pumpkin: Couple VGPU and VSRAM_GPU regulators arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU compatible arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU arm64: dts: mediatek: mt8186: Add GPU node Nícolas F. R. A. Prado (1): arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 +- .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 17 ++- .../boot/dts/mediatek/mt8183-pumpkin.dts | 11 +- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 34 ++--- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 18 +++ .../boot/dts/mediatek/mt8192-asurada.dtsi | 22 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 118 +++++++++++++++++- .../boot/dts/mediatek/mt8195-cherry.dtsi | 5 + arch/arm64/boot/dts/mediatek/mt8195.dtsi | 95 +++++++++++++- 9 files changed, 305 insertions(+), 26 deletions(-) Tested-by: Chen-Yu Tsai