mbox series

[net-next,0/5] octeontx2-pf: HTB offload support

Message ID 20230112173120.23312-1-hkelam@marvell.com
Headers
Series octeontx2-pf: HTB offload support |

Message

Hariprasad Kelam Jan. 12, 2023, 5:31 p.m. UTC 
  octeontx2 silicon and CN10K transmit interface consists of five
transmit levels starting from MDQ, TL4 to TL1. Once packets are
submitted to MDQ, hardware picks all active MDQs using strict
priority, and MDQs having the same priority level are chosen using
round robin. Each packet will traverse MDQ, TL4 to TL1 levels.
Each level contains an array of queues to support scheduling and
shaping.

As HTB supports classful queuing mechanism by supporting rate and
ceil and allow the user to control the absolute bandwidth to
particular classes of traffic the same can be achieved by
configuring shapers and schedulers on different transmit levels.

This series of patches adds support for HTB offload,

Patch1: Allow strict priority parameter in HTB offload mode.

Patch2: defines APIs such that the driver can dynamically initialize/
        deinitialize the send queues.

Patch3: Refactors transmit alloc/free calls as preparation for QOS
        offload code.

Patch4: Adds devlink support for the user to configure round-robin
        priority at TL1

Patch5:  Adds actual HTB offload support.


Hariprasad Kelam (2):
  octeontx2-pf: Refactor schedular queue alloc/free calls
  octeontx2-pf: Add devlink support to configure TL1 RR_PRIO

Naveen Mamindlapalli (2):
  sch_htb: Allow HTB priority parameter in offload mode
  octeontx2-pf: Add support for HTB offload

Subbaraya Sundeep (1):
  octeontx2-pf: qos send queues management

 .../ethernet/marvell/octeontx2/af/common.h    |    2 +-
 .../net/ethernet/marvell/octeontx2/af/mbox.h  |    9 +-
 .../net/ethernet/marvell/octeontx2/af/rvu.c   |   15 +
 .../net/ethernet/marvell/octeontx2/af/rvu.h   |    1 +
 .../marvell/octeontx2/af/rvu_debugfs.c        |    5 +
 .../ethernet/marvell/octeontx2/af/rvu_nix.c   |   84 +-
 .../ethernet/marvell/octeontx2/nic/Makefile   |    2 +-
 .../marvell/octeontx2/nic/otx2_common.c       |  115 +-
 .../marvell/octeontx2/nic/otx2_common.h       |   30 +-
 .../marvell/octeontx2/nic/otx2_devlink.c      |   84 +
 .../marvell/octeontx2/nic/otx2_ethtool.c      |   31 +-
 .../ethernet/marvell/octeontx2/nic/otx2_pf.c  |   93 +-
 .../ethernet/marvell/octeontx2/nic/otx2_reg.h |   13 +
 .../ethernet/marvell/octeontx2/nic/otx2_tc.c  |    7 +-
 .../marvell/octeontx2/nic/otx2_txrx.c         |   27 +-
 .../marvell/octeontx2/nic/otx2_txrx.h         |    3 +-
 .../ethernet/marvell/octeontx2/nic/otx2_vf.c  |    8 +-
 .../net/ethernet/marvell/octeontx2/nic/qos.c  | 1547 +++++++++++++++++
 .../net/ethernet/marvell/octeontx2/nic/qos.h  |   71 +
 .../ethernet/marvell/octeontx2/nic/qos_sq.c   |  304 ++++
 include/net/pkt_cls.h                         |    1 +
 net/sched/sch_htb.c                           |    7 +-
 22 files changed, 2372 insertions(+), 87 deletions(-)
 create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/qos.c
 create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/qos.h
 create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c

--
2.17.1

Comments

Jakub Kicinski Jan. 13, 2023, 5:07 a.m. UTC | #1 
On Thu, 12 Jan 2023 23:01:15 +0530 Hariprasad Kelam wrote:
> octeontx2 silicon and CN10K transmit interface consists of five
> transmit levels starting from MDQ, TL4 to TL1. Once packets are
> submitted to MDQ, hardware picks all active MDQs using strict
> priority, and MDQs having the same priority level are chosen using
> round robin. Each packet will traverse MDQ, TL4 to TL1 levels.
> Each level contains an array of queues to support scheduling and
> shaping.
> 
> As HTB supports classful queuing mechanism by supporting rate and
> ceil and allow the user to control the absolute bandwidth to
> particular classes of traffic the same can be achieved by
> configuring shapers and schedulers on different transmit levels.
> 
> This series of patches adds support for HTB offload,
> 
> Patch1: Allow strict priority parameter in HTB offload mode.
> 
> Patch2: defines APIs such that the driver can dynamically initialize/
>         deinitialize the send queues.
> 
> Patch3: Refactors transmit alloc/free calls as preparation for QOS
>         offload code.
> 
> Patch4: Adds devlink support for the user to configure round-robin
>         priority at TL1
> 
> Patch5:  Adds actual HTB offload support.

Rahul, since you're working on fixing the HTB offload warn - 
would you mind reviewing this series?

https://lore.kernel.org/all/20230112173120.23312-1-hkelam@marvell.com/
Rahul Rameshbabu Jan. 13, 2023, 6:20 a.m. UTC | #2 
CCed Maxim Mikityanskiy since he has authored and done an extensive
amount of work on HTB offload support.

On Thu, 12 Jan, 2023 21:07:38 -0800 Jakub Kicinski <kuba@kernel.org> wrote:
> On Thu, 12 Jan 2023 23:01:15 +0530 Hariprasad Kelam wrote:
>> octeontx2 silicon and CN10K transmit interface consists of five
>> transmit levels starting from MDQ, TL4 to TL1. Once packets are
>> submitted to MDQ, hardware picks all active MDQs using strict
>> priority, and MDQs having the same priority level are chosen using
>> round robin. Each packet will traverse MDQ, TL4 to TL1 levels.
>> Each level contains an array of queues to support scheduling and
>> shaping.
>> 
>> As HTB supports classful queuing mechanism by supporting rate and
>> ceil and allow the user to control the absolute bandwidth to
>> particular classes of traffic the same can be achieved by
>> configuring shapers and schedulers on different transmit levels.
>> 
>> This series of patches adds support for HTB offload,
>> 
>> Patch1: Allow strict priority parameter in HTB offload mode.
>> 
>> Patch2: defines APIs such that the driver can dynamically initialize/
>>         deinitialize the send queues.
>> 
>> Patch3: Refactors transmit alloc/free calls as preparation for QOS
>>         offload code.
>> 
>> Patch4: Adds devlink support for the user to configure round-robin
>>         priority at TL1
>> 
>> Patch5:  Adds actual HTB offload support.
>
> Rahul, since you're working on fixing the HTB offload warn - 
> would you mind reviewing this series?
>
> https://lore.kernel.org/all/20230112173120.23312-1-hkelam@marvell.com/

I will take a look at the series and respond to the components I can
verify.