Message ID | 20230104232253.24743-1-matthew.gerlach@linux.intel.com |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 138-20020a630090000000b004a42c4cc051si5842033pga.657.2023.01.04.15.23.31; Wed, 04 Jan 2023 15:23:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=O2T2qj7I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234761AbjADXWf (ORCPT <rfc822;tmhikaru@gmail.com> + 99 others); Wed, 4 Jan 2023 18:22:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240549AbjADXWX (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 4 Jan 2023 18:22:23 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 338213B901; Wed, 4 Jan 2023 15:22:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672874543; x=1704410543; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=WkdfgZxzNh8MTB9VLy6eNylsSALpzw0WgKG1HPdLwjk=; b=O2T2qj7I5qDPup5snatMxT+EvfeBiRriiVTBcnezzxWng7gBftljvfqe 1mPh4mzn+6B2CUYR9MD6fBDsCWOSELtsdEj+OOmmq1Dlnsrsjf05O7oFV JrUjLpT834gAptGGi4uYmvFlETJCtkKHpns0Yg0Ct+KcmgUZVOJLerOm2 5fdJZXAP61r5fmoEFYRnqArekUs1lTrHGSWxz9G19CoRqb/iaPAlq7Tmx 9MesyLAFein3xB+ird+9xJP4jGZi1q4cMbdRg9dD0DIRD4FvgKKr69V8f zLB/QoTGb/bZi6jVwtveSBdc8UsLe6w2BgP9XinmqUJGFsyl/cTQ5uDKK g==; X-IronPort-AV: E=McAfee;i="6500,9779,10580"; a="301762105" X-IronPort-AV: E=Sophos;i="5.96,301,1665471600"; d="scan'208";a="301762105" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2023 15:22:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10580"; a="900739350" X-IronPort-AV: E=Sophos;i="5.96,301,1665471600"; d="scan'208";a="900739350" Received: from rhweight-wrk1.ra.intel.com ([137.102.106.43]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2023 15:22:19 -0800 From: matthew.gerlach@linux.intel.com To: hao.wu@intel.com, yilun.xu@intel.com, russell.h.weight@intel.com, basheer.ahmed.muddebihal@intel.com, trix@redhat.com, mdf@kernel.org, linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, tianfei.zhang@intel.com, corbet@lwn.net, gregkh@linuxfoundation.org, linux-serial@vger.kernel.org, jirislaby@kernel.org, geert+renesas@glider.be, andriy.shevchenko@linux.intel.com, niklas.soderlund+renesas@ragnatech.se, macro@orcam.me.uk, johan@kernel.org, lukas@wunner.de, ilpo.jarvinen@linux.intel.com, marpagan@redhat.com, bagasdotme@gmail.com Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com> Subject: [PATCH v9 0/4] Enhance definition of DFH and use enhancements for UART driver Date: Wed, 4 Jan 2023 15:22:49 -0800 Message-Id: <20230104232253.24743-1-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754136181655053879?= X-GMAIL-MSGID: =?utf-8?q?1754136181655053879?= |
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Enhance definition of DFH and use enhancements for UART driver
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Message
Matthew Gerlach
Jan. 4, 2023, 11:22 p.m. UTC
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
This patchset enhances the definition of the Device Feature Header (DFH) used by
the Device Feature List (DFL) bus and then uses the new enhancements in a UART
driver.
The enhancements to the DFH includes the introduction of parameter blocks.
Like PCI capabilities, the DFH parameter blocks further describe
the hardware to software. In the case of the UART, the parameter blocks
provide information for the interrupt, clock frequency, and register layout.
Duplication of code parsing of the parameter blocks in multiple DFL drivers
is a concern. Using swnodes was considered to help minimize parsing code
duplication, but their use did not help the problem. Furthermore the highly
changeable nature of FPGAs employing the DFL bus makes the use of swnodes
inappropriate.
Patch 1 updates the DFL documentation to describe the added functionality to DFH.
Patch 2 adds the definitions for DFHv1.
Patch 3 adds basic support for DFHv1. It adds functionality to parse parameter blocks
and adds the functionality to parse the explicit location of a feature's register set.
Patch 4 adds a DFL UART driver that makes use of the new features of DFHv1.
Basheer Ahmed Muddebihal (1):
fpga: dfl: Add DFHv1 Register Definitions
Matthew Gerlach (3):
Documentation: fpga: dfl: Add documentation for DFHv1
fpga: dfl: add basic support for DFHv1
tty: serial: 8250: add DFL bus driver for Altera 16550.
Documentation/fpga/dfl.rst | 117 ++++++++++++++
drivers/fpga/dfl.c | 245 +++++++++++++++++++++++------
drivers/fpga/dfl.h | 43 +++++
drivers/tty/serial/8250/8250_dfl.c | 167 ++++++++++++++++++++
drivers/tty/serial/8250/Kconfig | 12 ++
drivers/tty/serial/8250/Makefile | 1 +
include/linux/dfl.h | 8 +
7 files changed, 542 insertions(+), 51 deletions(-)
create mode 100644 drivers/tty/serial/8250/8250_dfl.c