From patchwork Tue Jan 3 18:02:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashok Raj X-Patchwork-Id: 3514 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp4747438wrt; Tue, 3 Jan 2023 10:03:17 -0800 (PST) X-Google-Smtp-Source: AMrXdXvDbnCra6lmQTm8smuDDomTF/C8IYm4B/TFdmuot8FseI7Sqfw/2UGEzSmi4wmJr7W8Eks/ X-Received: by 2002:a17:906:11d9:b0:7ae:7c4e:195b with SMTP id o25-20020a17090611d900b007ae7c4e195bmr38509136eja.22.1672768996975; Tue, 03 Jan 2023 10:03:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672768996; cv=none; d=google.com; s=arc-20160816; b=pThN4YL2mUjAXMKTqPRxWfoAyP1aumJ+Gj/Fh1KncpIqwoVr11RoTkXk1lqcWAZNz4 JPp//iv/remCIynyVC//ZJJJm3J8RTZJfGRQonSHhQARjIeuqslCfoaJkUuNI+lvYUSh wtLXDa4omvGQNv8maiuBuP9v/GW6lEVDz1CQKy1oENXod8yK5UQx00O93Ywdn+cKKPsk sjMlUPvEF2P0sXbAgFbeJo1GVtA2iSJczbDoLOVpn03iyQ6Ql2xuAVHSYq46uP6DBPuM Tu3ph0YUcAQLQWVDvX6qcVBiQpuZUsehzBlYYMghyVYn+sSkX5qm7qyvLuaJIR7sAGbc V1sQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=5We/S9TI4oOplg+rv6SAwIDY0/LsAhSHqJ3Yh8sERxw=; b=sVZPMfB8s8+82Y2dkluAqBRgJDGmZskc3ME0almX9V+P7i5T65Ho/Bc1vRM71Xsfzi cNEqYl2qodNZF9gw/qcI5t8NJCTJ43EpMQS+0zjDVjZ9t84Zw1IRIi4/J8fWyoN4WcKx KPBE0eWHX452Nkw1J32gcaRslpX8fZluyYylyLyw5w5L1ABLDFbv7cxVR37CCbLf3ZFB zwOXHotsFbzqBtpkcfDjhiMIMTSznO4VxxoCihv6FSTA1mpgdXubeGBE52wwCZg1bLCz PUUvpYbqUbJKucCNx5IeMaKseZlBvS5TtZ78vMRDUR4wVM/VAdzfrJFE/QMoDQcJHunm GPUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="H/vCu0QB"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nd27-20020a170907629b00b0084c83d43fd6si16094074ejc.700.2023.01.03.10.02.53; Tue, 03 Jan 2023 10:03:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="H/vCu0QB"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238558AbjACSC3 (ORCPT + 99 others); Tue, 3 Jan 2023 13:02:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230173AbjACSC0 (ORCPT ); Tue, 3 Jan 2023 13:02:26 -0500 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48430DF4A for ; Tue, 3 Jan 2023 10:02:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672768943; x=1704304943; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=QaR9m9x2RnpfBuN63lFNnMNIhM7svadcT57mK4Erhv8=; b=H/vCu0QBZTGQehVRvjI1pslw6iegFmRJHCDJxDUmCfr/70Z5FerpSNs2 bkBt/KI6Yw3a4J4YA93aSPvhyMF2s62nKI86gXQF+DURkDj6bU5erh6TI qUOR39fImMMHa5OLsJxnNTj6NgxkyAv2XoEgqziCQpWV5cvGOUuXpiqgW r+CuUw8Ysxxk6Mk0g0QM9b+dO4ENfrSAlXOKCEDUiz+RacQmaMZh1Idon Rh/g7oMNkYdDHAiUGYgkSeVb9iml0v6Io7lfLGBRHKsozIdNhPAe0JVj9 Y0k8QQfZysRMxY0L+1RYDJahlPJXFzB1qaeBWbg1DIXoR5zQImJQTR2Lp w==; X-IronPort-AV: E=McAfee;i="6500,9779,10579"; a="384010630" X-IronPort-AV: E=Sophos;i="5.96,297,1665471600"; d="scan'208";a="384010630" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jan 2023 10:02:22 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10579"; a="654876876" X-IronPort-AV: E=Sophos;i="5.96,297,1665471600"; d="scan'208";a="654876876" Received: from araj-ucode.jf.intel.com ([10.23.0.19]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jan 2023 10:02:24 -0800 From: Ashok Raj To: Borislav Petkov , Thomas Gleixner Cc: X86-kernel , LKML Mailing List , Ashok Raj , Dave Hansen , Tony Luck , Alison Schofield , Reinette Chatre , Tom Lendacky Subject: [PATCH v3 0/6] Some fixes and cleanups for microcode Date: Tue, 3 Jan 2023 10:02:06 -0800 Message-Id: <20230103180212.333496-1-ashok.raj@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754025423873369431?= X-GMAIL-MSGID: =?utf-8?q?1754025423873369431?= Hi Boris This is a followup after earlier post [1] Sending the rest of the patches after first 2 patches that were merged. Please review and consider applying. Changes since v1: - Updated comments and added reviewed by from Thomas. - Moved microcode_check() to where it originally was based on your feedback. [2] [1] https://lore.kernel.org/lkml/20221227192340.8358-1-ashok.raj@intel.com/ [2] https://lore.kernel.org/lkml/Y6tMgcU2aGbx%2F6yt@zn.tnic/ Ashok Raj (6): x86/microcode: Add a parameter to microcode_check() to store CPU capabilities x86/microcode/core: Take a snapshot before and after applying microcode x86/microcode: Display revisions only when update is successful x86/microcode/intel: Use a plain revision argument for print_ucode_rev() x86/microcode/intel: Print old and new rev during early boot x86/microcode/intel: Print when early microcode loading fails arch/x86/include/asm/processor.h | 3 +- arch/x86/kernel/cpu/common.c | 29 ++++++++++----- arch/x86/kernel/cpu/microcode/core.c | 17 ++++++--- arch/x86/kernel/cpu/microcode/intel.c | 52 +++++++++++++-------------- 4 files changed, 60 insertions(+), 41 deletions(-) base-commit: 88603b6dc419445847923fcb7fe5080067a30f98