[v1,0/3] Add timer driver for StarFive JH7110 RISC-V SoC

Message ID 20221223094801.181315-1-xingyu.wu@starfivetech.com
Headers
Series Add timer driver for StarFive JH7110 RISC-V SoC |

Message

Xingyu Wu Dec. 23, 2022, 9:47 a.m. UTC
  This patch serises are to add timer driver for the StarFive JH7110
RISC-V SoC. The first patch adds documentation to describe device
tree bindings. The subsequent patch adds timer driver and support
JH7110 SoC. The last patch adds device node about timer to JH7110
dts.

This timer has eight free-running 32 bit counters and uses four in
StarFive JH7110 SoC. They support single-run mode and continuous-run
mode.

The last patch should be applied after the patchset [1]:
[1] https://lore.kernel.org/all/20221118011714.70877-1-hal.feng@starfivetech.com/


Xingyu Wu (3):
  dt-bindings: timer: Add timer for StarFive JH7110 SoC
  clocksource: Add StarFive timer driver
  riscv: dts: jh7110: starfive: Add timer node

 .../timer/starfive,jh7110-timers.yaml         | 105 ++++
 MAINTAINERS                                   |   7 +
 arch/riscv/boot/dts/starfive/jh7110.dtsi      |  22 +
 drivers/clocksource/Kconfig                   |  12 +
 drivers/clocksource/Makefile                  |   1 +
 drivers/clocksource/timer-starfive.c          | 465 ++++++++++++++++++
 drivers/clocksource/timer-starfive.h          | 104 ++++
 7 files changed, 716 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml
 create mode 100644 drivers/clocksource/timer-starfive.c
 create mode 100644 drivers/clocksource/timer-starfive.h


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