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[v4,0/4] arm64: dts: qcom: enable sa8540p-ride rtc

Message ID 20221219191000.2570545-1-echanude@redhat.com
Headers
Series arm64: dts: qcom: enable sa8540p-ride rtc |

Message

Eric Chanudet Dec. 19, 2022, 7:09 p.m. UTC 
  Enable sa8540p-ride rtc on pmic@0.

sa8540p base boards share the same pmics description, currently in
pm8450a.dtsi. Rename the file to make this explicit and use it in both
sa8540p-ride.dts and sa8295p-adp.dts.
Add the missing offset where appropriate for the alarm register bank in
other qcom,pm8941-rtc description.

Changes since v3:
- Amend patch #1 incorrect description.

Changes since v2:
- rename pm8450a.dtsi to sa8540p-pmics.dtsi.

Changes since v1:
- Add "alarm" register bank offset at 0x6100 in qcom,pm8941-rtc
  descriptions.

Eric Chanudet (4):
  arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
  arm64: dts: qcom: sa8450p-pmics: add rtc node
  arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
  arm64: dts: qcom: pm8941-rtc add alarm register

 arch/arm64/boot/dts/qcom/pm8150.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/pm8916.dtsi          |  3 +-
 arch/arm64/boot/dts/qcom/pm8950.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi     |  2 +-
 arch/arm64/boot/dts/qcom/pmp8074.dtsi         |  2 +-
 arch/arm64/boot/dts/qcom/pms405.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sa8295p-adp.dts      | 79 +------------------
 .../qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} |  8 ++
 arch/arm64/boot/dts/qcom/sa8540p-ride.dts     |  2 +-
 9 files changed, 17 insertions(+), 85 deletions(-)
 rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (90%)

Comments

Andrew Halaney Dec. 20, 2022, 7:51 p.m. UTC | #1 
On Mon, Dec 19, 2022 at 02:09:57PM -0500, Eric Chanudet wrote:
> Enable sa8540p-ride rtc on pmic@0.
> 
> sa8540p base boards share the same pmics description, currently in
> pm8450a.dtsi. Rename the file to make this explicit and use it in both
> sa8540p-ride.dts and sa8295p-adp.dts.
> Add the missing offset where appropriate for the alarm register bank in
> other qcom,pm8941-rtc description.
> 
> Changes since v3:
> - Amend patch #1 incorrect description.
> 
> Changes since v2:
> - rename pm8450a.dtsi to sa8540p-pmics.dtsi.
> 
> Changes since v1:
> - Add "alarm" register bank offset at 0x6100 in qcom,pm8941-rtc
>   descriptions.
> 
> Eric Chanudet (4):
>   arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
>   arm64: dts: qcom: sa8450p-pmics: add rtc node
>   arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
>   arm64: dts: qcom: pm8941-rtc add alarm register
> 
>  arch/arm64/boot/dts/qcom/pm8150.dtsi          |  2 +-
>  arch/arm64/boot/dts/qcom/pm8916.dtsi          |  3 +-
>  arch/arm64/boot/dts/qcom/pm8950.dtsi          |  2 +-
>  arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi     |  2 +-
>  arch/arm64/boot/dts/qcom/pmp8074.dtsi         |  2 +-
>  arch/arm64/boot/dts/qcom/pms405.dtsi          |  2 +-
>  arch/arm64/boot/dts/qcom/sa8295p-adp.dts      | 79 +------------------
>  .../qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} |  8 ++
>  arch/arm64/boot/dts/qcom/sa8540p-ride.dts     |  2 +-
>  9 files changed, 17 insertions(+), 85 deletions(-)
>  rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (90%)
> 
> -- 
> 2.38.1
> 

Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride

Here's some naive tests I did for the record:

    [root@localhost ~]# cat /proc/interrupts | grep alarm
    180:          2          0          0          0          0          0          0          0  pmic_arb 101777441 Edge      pm8xxx_rtc_alarm
    [root@localhost ~]# echocat /proc/interrupts | grep alarm> /sys/class/rtc/rtc0/wakealarm && sleep 10 && cat /proc/interrupts | grep alarm
    180:          3     cat /proc/interrupts | grep alarm0          0  pmic_arb 101777441 Edge      pm8xxx_rtc_alarm
    180:          3          0          0          0          0          0          0          0  pmic_arb 101777441 Edge      pm8xxx_rtc_alarm
    [root@localhost ~]# 
    [root@localhost ~]# 
    [root@localhost ~]# cat /proc/interrupts | grep alarm
    180:          3          0          0          0          0          0          0          0  pmic_arb 101777441 Edge      pm8xxx_rtc_alarm
    [root@localhost ~]# echo $(date '+%s' -d '+ 10 seconds') > /sys/class/rtc/rtc0/wakealarm && sleep 10 && cat /proc/interrupts | grep alarm
    180:          3          0          0          0          0          0          0          0  pmic_arb 101777441 Edge      pm8xxx_rtc_alarm
    [root@localhost ~]# timedatectl && sleep 5 && timedatectl
                   Local time: Wed 1970-01-14 05:20:32 UTC
               Universal time: Wed 1970-01-14 05:20:32 UTC
                     RTC time: Wed 1970-01-14 05:20:32
                    Time zone: UTC (UTC, +0000)
    System clock synchronized: no
                  NTP service: active
              RTC in local TZ: no
                   Local time: Wed 1970-01-14 05:20:37 UTC
               Universal time: Wed 1970-01-14 05:20:37 UTC
                     RTC time: Wed 1970-01-14 05:20:37
                    Time zone: UTC (UTC, +0000)
    System clock synchronized: no
                  NTP service: active
              RTC in local TZ: no
    [root@localhost ~]#
Bjorn Andersson Jan. 11, 2023, 5:09 a.m. UTC | #2 
On Mon, 19 Dec 2022 14:09:57 -0500, Eric Chanudet wrote:
> Enable sa8540p-ride rtc on pmic@0.
> 
> sa8540p base boards share the same pmics description, currently in
> pm8450a.dtsi. Rename the file to make this explicit and use it in both
> sa8540p-ride.dts and sa8295p-adp.dts.
> Add the missing offset where appropriate for the alarm register bank in
> other qcom,pm8941-rtc description.
> 
> [...]

Applied, thanks!

[1/4] arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
      commit: 2e1cec6e1b5b525ce1022da0ff6cd2b47532da9a
[2/4] arm64: dts: qcom: sa8450p-pmics: add rtc node
      commit: 650fed7806b7298a274a5f9f604d9ae3e0000687
[3/4] arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
      commit: e1deaa8437c4b6ce5a28e98e66d89de99378e72d
[4/4] arm64: dts: qcom: pm8941-rtc add alarm register
      commit: ceb01bb895716c18c3dc711af978c19e327444e5

Best regards,