Message ID | 20221216230722.21404-1-quic_molvera@quicinc.com |
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Fri, 16 Dec 2022 23:07:50 +0000 Received: from nasanex01b.na.qualcomm.com (corens_vlan604_snip.qualcomm.com [10.53.140.1]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BGN7mV7004270 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 23:07:48 GMT Received: from hu-molvera-sd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 16 Dec 2022 15:07:48 -0800 From: Melody Olvera <quic_molvera@quicinc.com> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Konrad Dybcio <konrad.dybcio@linaro.org>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: Taniya Das <quic_tdas@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Melody Olvera <quic_molvera@quicinc.com> Subject: [PATCH v5 0/2] clk: qcom: Add clocks for the QDU1000 and QRU1000 SoCs Date: Fri, 16 Dec 2022 15:07:20 -0800 Message-ID: <20221216230722.21404-1-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ucLSL9V_66MimMZkWAeHHTkFkntDO83W X-Proofpoint-GUID: ucLSL9V_66MimMZkWAeHHTkFkntDO83W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-16_14,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 clxscore=1011 adultscore=0 mlxscore=0 bulkscore=0 spamscore=0 phishscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212160204 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752413927959446231?= X-GMAIL-MSGID: =?utf-8?q?1752413927959446231?= |
Series |
clk: qcom: Add clocks for the QDU1000 and QRU1000 SoCs
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Message
Melody Olvera
Dec. 16, 2022, 11:07 p.m. UTC
This series adds the GCC, RPMh, and PDC clock support required for the QDU1000 and QRU1000 SoCs along with the devicetree bindings for them. The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit 1000 are new SoCs meant for enabling Open RAN solutions. See more at https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf Changes from v4: - removed syscon from bindings and update style - removed optional clocks and redundant properties - updated compatible to new standard Changes from v3: - added example sources for PCIE and USB clocks - added index enum in GCC clock driver - fixed some style issues - removed pdc patches from set Changes from v2: - Revised dt-bindings - Removed qru compat strings - Updated some clocks to use clk_branch ops instead of clk_branch2 and HALT_ENABLE Melody Olvera (1): dt-bindings: clock: Add QDU1000 and QRU1000 GCC clocks Taniya Das (1): clk: qcom: Add QDU1000 and QRU1000 GCC support .../bindings/clock/qcom,qdu1000-gcc.yaml | 51 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-qdu1000.c | 2653 +++++++++++++++++ include/dt-bindings/clock/qcom,qdu1000-gcc.h | 175 ++ 5 files changed, 2888 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml create mode 100644 drivers/clk/qcom/gcc-qdu1000.c create mode 100644 include/dt-bindings/clock/qcom,qdu1000-gcc.h base-commit: ca39c4daa6f7f770b1329ffb46f1e4a6bcc3f291