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From: Sibi Sankar <quic_sibis@quicinc.com>
To: <andersson@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<manivannan.sadhasivam@linaro.org>
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Sibi Sankar <quic_sibis@quicinc.com>
Subject: [PATCH 0/2] Add support for CPUCP mailbox controller
Date: Tue, 13 Dec 2022 19:34:07 +0530
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Add support for CPUCP mailbox controller
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Message
Sibi Sankar
Dec. 13, 2022, 2:04 p.m. UTC
Add support for CPUSS Control Processor (CPUCP) mailbox controller which enables communication between AP and CPUCP by acting as a doorbell between them. Sibi Sankar (2): dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller mailbox: Add support for QTI CPUCP mailbox controller .../bindings/mailbox/qcom,cpucp-mbox.yaml | 51 ++++++ drivers/mailbox/Kconfig | 9 ++ drivers/mailbox/Makefile | 2 + drivers/mailbox/qcom-cpucp-mbox.c | 176 +++++++++++++++++++++ 4 files changed, 238 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c
Comments
Additional patches got tagged along. Please ignore. On 12/13/22 19:34, Sibi Sankar wrote: > Add support for CPUSS Control Processor (CPUCP) mailbox controller > which enables communication between AP and CPUCP by acting as a > doorbell between them. > > Sibi Sankar (2): > dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller > mailbox: Add support for QTI CPUCP mailbox controller > > .../bindings/mailbox/qcom,cpucp-mbox.yaml | 51 ++++++ > drivers/mailbox/Kconfig | 9 ++ > drivers/mailbox/Makefile | 2 + > drivers/mailbox/qcom-cpucp-mbox.c | 176 +++++++++++++++++++++ > 4 files changed, 238 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml > create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c >