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[2620:137:e000::1:20]) by mx.google.com with ESMTP id t1-20020a170906268100b007af15567a5bsi9241861ejc.432.2022.12.05.09.45.10; Mon, 05 Dec 2022 09:45:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=cWTTpNA4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232020AbiLERos (ORCPT + 99 others); Mon, 5 Dec 2022 12:44:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231169AbiLERoq (ORCPT ); Mon, 5 Dec 2022 12:44:46 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43DCD1DA50; Mon, 5 Dec 2022 09:44:46 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B5GX1dv008535; Mon, 5 Dec 2022 17:44:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=n71Q8U1lxaO4T7pMOJN2dnk3bwSwPz23bo7YNGLuTZU=; b=cWTTpNA4MPr2QZ9xYuYu4WZuHh2akoP77O3q3wThM1hGFGE78jHMtkfKjMlsxqVO63fk KU0egHHHd3f0mBuRmKVJjrU/2KUE9uMnmTkylQyCcljOqio+OONFjHOF+wmAUXlpgbFF s0AaXStjSp/hst89Za0mOPumQK9RhnT8F+UYeigmJqA5uNqj0/Jr/RH9y7uh36u6bgIq JKDy6XyAesnOF6SKf7WNK+LClpcK0l1fuAOTcPGsZi6iYuN99pg8+bKh7EivgUaRipfl p47BQOhyQ9Zn83u/8nVWB9wTw2952W9CY+YywmcOLsZ9TwLmKFwQTc9ErK75TC+uonTC uQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3m7wdxvv8g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 05 Dec 2022 17:44:40 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2B5Hid9e006219 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 5 Dec 2022 17:44:39 GMT Received: from th-lint-050.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 5 Dec 2022 09:44:39 -0800 From: Bjorn Andersson To: Dmitry Baryshkov CC: Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Kalyan Thota , Jessica Zhang , "Kuogee Hsieh" , Johan Hovold , Sankeerth Billakanti , , , , , Subject: [PATCH v4 00/13] drm/msm: Add SC8280XP support Date: Mon, 5 Dec 2022 09:44:20 -0800 Message-ID: <20221205174433.16847-1-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: udJ2iLcOG7coSnHp6qB7GtdrraaRRo8D X-Proofpoint-ORIG-GUID: udJ2iLcOG7coSnHp6qB7GtdrraaRRo8D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-05_01,2022-12-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 clxscore=1011 adultscore=0 mlxscore=0 phishscore=0 spamscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212050146 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751396996155412537?= X-GMAIL-MSGID: =?utf-8?q?1751396996155412537?= This introduces support for the SC8280XP platform in the MDSS, DPU and DP driver. It reworks the HDP handling in the DP driver to support external HPD sources - such as the dp-connector, or USB Type-C altmode. It then introduces the display clock controllers, mdss, dpu and displayport controllers and link everything together, for both the MDSS instances on the platform, and lastly enables EDP on the compute reference device and 6 of the MiniDP outputs on the automotive development platform. The patches was previously sent separately, but submitting them together here as they (except dts addition) goes in the same tree. Bjorn Andersson (13): dt-bindings: display/msm: Add binding for SC8280XP MDSS drm/msm/dpu: Introduce SC8280XP drm/msm: Introduce SC8280XP MDSS dt-bindings: msm/dp: Add SDM845 and SC8280XP compatibles drm/msm/dp: Stop using DP id as index in desc drm/msm/dp: Add DP and EDP compatibles for SC8280XP drm/msm/dp: Add SDM845 DisplayPort instance drm/msm/dp: Implement hpd_notify() drm/msm/dp: Don't enable HPD interrupts for edp drm/msm/dp: Rely on hpd_enable/disable callbacks arm64: dts: qcom: sc8280xp: Define some of the display blocks arm64: dts: qcom: sc8280xp-crd: Enable EDP arm64: dts: qcom: sa8295-adp: Enable DP instances .../bindings/display/msm/dp-controller.yaml | 3 + .../display/msm/qcom,sc8280xp-dpu.yaml | 122 +++ .../display/msm/qcom,sc8280xp-mdss.yaml | 143 +++ arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 243 ++++- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 72 +- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 838 ++++++++++++++++++ .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 216 +++++ .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 18 + .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 + drivers/gpu/drm/msm/dp/dp_display.c | 151 ++-- drivers/gpu/drm/msm/dp/dp_display.h | 1 + drivers/gpu/drm/msm/dp/dp_drm.c | 3 + drivers/gpu/drm/msm/dp/dp_drm.h | 4 + drivers/gpu/drm/msm/msm_drv.h | 1 + drivers/gpu/drm/msm/msm_mdss.c | 4 + 18 files changed, 1769 insertions(+), 57 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml