Message ID | 20221129140313.886192-1-apatel@ventanamicro.com |
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Series |
Improve CLOCK_EVT_FEAT_C3STOP feature setting
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Message
Anup Patel
Nov. 29, 2022, 2:03 p.m. UTC
This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP feature based on RISC-V platform capabilities. These patches can also be found in riscv_timer_dt_imp_v4 branch at: https://github.com/avpatel/linux.git Changes since v3: - Rebased on Linux-6.1-rc7 - Replaced PATCH1 with a patch to initialize broadcast timer Changes since v2: - Include Conor's revert patch as the first patch and rebased other patches - Update PATCH2 to document bindings for separate RISC-V timer DT node - Update PATCH3 based on RISC-V timer DT node bindings Changes since v1: - Rebased on Linux-5.19-rc8 - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu" Anup Patel (2): dt-bindings: timer: Add bindings for the RISC-V timer device clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT Conor Dooley (1): RISC-V: time: initialize broadcast hrtimer based clock event device .../bindings/timer/riscv,timer.yaml | 52 +++++++++++++++++++ arch/riscv/kernel/time.c | 3 ++ drivers/clocksource/timer-riscv.c | 12 ++++- 3 files changed, 66 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml
Comments
On Tue, 29 Nov 2022 06:03:10 PST (-0800), apatel@ventanamicro.com wrote: > This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP > feature based on RISC-V platform capabilities. > > These patches can also be found in riscv_timer_dt_imp_v4 branch at: > https://github.com/avpatel/linux.git > > Changes since v3: > - Rebased on Linux-6.1-rc7 > - Replaced PATCH1 with a patch to initialize broadcast timer > > Changes since v2: > - Include Conor's revert patch as the first patch and rebased other patches > - Update PATCH2 to document bindings for separate RISC-V timer DT node > - Update PATCH3 based on RISC-V timer DT node bindings > > Changes since v1: > - Rebased on Linux-5.19-rc8 > - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu" > > Anup Patel (2): > dt-bindings: timer: Add bindings for the RISC-V timer device > clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT > > Conor Dooley (1): > RISC-V: time: initialize broadcast hrtimer based clock event device > > .../bindings/timer/riscv,timer.yaml | 52 +++++++++++++++++++ > arch/riscv/kernel/time.c | 3 ++ > drivers/clocksource/timer-riscv.c | 12 ++++- > 3 files changed, 66 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml Acked-by: Palmer Dabbelt <palmer@rivosinc.com> IIRC the main issue here were the DT bindings, though, so I think we'll need to make sure that's sorted out.