mbox series

[v3,0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting

Message ID 20221125112105.427045-1-apatel@ventanamicro.com
Headers
Series Improve CLOCK_EVT_FEAT_C3STOP feature setting |

Message

Anup Patel Nov. 25, 2022, 11:21 a.m. UTC 
  This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
feature based on RISC-V platform capabilities.

These patches can also be found in riscv_timer_dt_imp_v3 branch at:
https://github.com/avpatel/linux.git

Changes since v2:
 - Include Conor's revert patch as the first patch and rebased other patches
 - Update PATCH2 to document bindings for separate RISC-V timer DT node
 - Update PATCH3 based on RISC-V timer DT node bindings

Changes since v1:
 - Rebased on Linux-5.19-rc8
 - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu"

Anup Patel (2):
  dt-bindings: timer: Add bindings for the RISC-V timer device
  clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT

Conor Dooley (1):
  Revert "clocksource/drivers/riscv: Events are stopped during CPU
    suspend"

 .../bindings/timer/riscv,timer.yaml           | 52 +++++++++++++++++++
 drivers/clocksource/timer-riscv.c             | 12 ++++-
 2 files changed, 63 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml