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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s18-20020a056402521200b0045d25cf222csi1174281edd.362.2022.11.24.05.24.47; Thu, 24 Nov 2022 05:25:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=yP120Q3c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229938AbiKXNGD (ORCPT + 99 others); Thu, 24 Nov 2022 08:06:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229698AbiKXNGC (ORCPT ); Thu, 24 Nov 2022 08:06:02 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C30212D32; Thu, 24 Nov 2022 05:05:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1669295159; x=1700831159; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=dvTX+Ug67Rydtz7WIYzbSx40KvDV6tXZ/nyLRF8t6Ng=; b=yP120Q3c0/M65ulgzq19/YJF++/5ugHCp3yJt8jQzj08uOg+I8Z1vu3F /VGFUN0vPeZ5g9YWl7nb1mm8GwQKzzwF5wMk9qT7zJ2E1szZpxiwT7vCT RNe7+kuNf4VDP55Wm4BUbibDCWVj/W+xHn6H973km68y6rWaP8j1hT37v +xWCDas1fjsjQp3cUQRbE6SEEmvHh057til5FWku030Ql1KD3ACK5JTGt YlINPC/alsEmfVzO0dm0kJG9uEqGPUL5wGuO3L9frbNP5/BzZQTHlM/ai Na628WlP32wgaZSDmn2iJnCWvPiwpzHsNg4vsRm4FeqKTNMB8Yn/3ErYl A==; X-IronPort-AV: E=Sophos;i="5.96,190,1665471600"; d="scan'208";a="185029281" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 24 Nov 2022 06:05:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 24 Nov 2022 06:05:36 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 24 Nov 2022 06:05:34 -0700 From: Conor Dooley To: CC: Conor Dooley , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Heiko Stuebner , Andrew Jones , Guo Ren , , Subject: [PATCH 0/2] riscv,isa fixups Date: Thu, 24 Nov 2022 13:04:39 +0000 Message-ID: <20221124130440.306771-1-conor.dooley@microchip.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750384049010092840?= X-GMAIL-MSGID: =?utf-8?q?1750384049010092840?= I noticed today while looking at the isa manual that I had not accounted for another couple of edge cases with my regex. As before, I think attempting to validate the canonical order for multiletter stuff makes no sense - but we should totally try to avoid false-positives for combinations that are known to be valid. Thanks, Conor. CC: Conor Dooley CC: Rob Herring CC: Krzysztof Kozlowski CC: Paul Walmsley CC: Palmer Dabbelt CC: Albert Ou CC: Heiko Stuebner CC: Andrew Jones CC: Guo Ren CC: linux-riscv@lists.infradead.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org Conor Dooley (2): dt-bindings: riscv: fix underscore requirement for addtional standard extensions dt-bindings: riscv: fix single letter canonical order Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)