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[2620:137:e000::1:20]) by mx.google.com with ESMTP id g12-20020a170902fe0c00b001786a4a4c98si40933plj.371.2022.11.16.21.03.37; Wed, 16 Nov 2022 21:03:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=sy6VZQzT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234736AbiKQFBK (ORCPT + 99 others); Thu, 17 Nov 2022 00:01:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234598AbiKQFA5 (ORCPT ); Thu, 17 Nov 2022 00:00:57 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9094B3C6F9; Wed, 16 Nov 2022 21:00:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1668661255; x=1700197255; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=RBlLGM0dgrfV1MWsy3HHtoXbOzkM5k1F9BEEOdYJ4QE=; b=sy6VZQzT43NNXWulL/RpCXRvStHAP54SsZ4Gz8TGqsJqskf+8bzW6m3A P92ZOGJV8QQNPmu8Ga9Ib0lkx58uexoU+doVRaUh2AMuFKyBOCk9M5wwn EAMD1ETb+nQMKtBpLG0mr8YmSKdSgHPK8naghhOnBVeDgasBQRLpSkYZL NKTo2ICfy3sBGVIbnwcgvRTdAUrwLB8h1pwvvrDjGqwyEpaP5Qrvaeg8s 16UkxOYnoGF2OQ2EHO2E0oIQv3qCF+g4no6dsTiz0dkzBdFeNIpck/Aiy 6FuUiaGkM6rWEhHJ+bMnog/gkWYAAznsigv0mtzb+r0ZnyU9qQXVYldMA w==; X-IronPort-AV: E=Sophos;i="5.96,169,1665471600"; d="scan'208";a="200162641" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Nov 2022 22:00:54 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 16 Nov 2022 22:00:54 -0700 Received: from CHE-LT-UNGSOFTWARE.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 16 Nov 2022 22:00:48 -0700 From: Kumaravel Thiagarajan To: , CC: , , , , , , , , , , , , , , , , Subject: [PATCH v5 tty-next 0/4] 8250: microchip: pci1xxxx: Add driver for the pci1xxxx's quad-uart function Date: Thu, 17 Nov 2022 10:31:22 +0530 Message-ID: <20221117050126.2966714-1-kumaravel.thiagarajan@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749718327627420042?= X-GMAIL-MSGID: =?utf-8?q?1749718327627420042?= pci1xxxx is a PCIe switch with a multi-function endpoint on one of its downstream ports. Quad-uart is one of the functions in the multi-function endpoint. This patch adds device driver for the quad-uart function and enumerates between 1 to 4 instances of uarts based on the PCIe subsystem device ID. The changes from v1->v2->v3->v4->v5 are mentioned in each patch in the patchset. Thanks to Andy Shevchenko, Ilpo Jarvinen, Chritophe JAILLET, Geert Uytterhoeven, Greg KH for their review comments. Kumaravel Thiagarajan (4): 8250: microchip: pci1xxxx: Add driver for quad-uart support. 8250: microchip: pci1xxxx: Add serial8250_pci_setup_port definition in 8250_pcilib.c 8250: microchip: pci1xxxx: Add RS485 support to quad-uart driver 8250: microchip: pci1xxxx: Add power management functions to quad-uart driver MAINTAINERS | 7 + drivers/tty/serial/8250/8250_pci.c | 24 +- drivers/tty/serial/8250/8250_pci1xxxx.c | 544 ++++++++++++++++++++++++ drivers/tty/serial/8250/8250_pcilib.c | 38 ++ drivers/tty/serial/8250/8250_pcilib.h | 9 + drivers/tty/serial/8250/8250_port.c | 8 + drivers/tty/serial/8250/Kconfig | 15 + drivers/tty/serial/8250/Makefile | 2 + include/uapi/linux/serial_core.h | 3 + 9 files changed, 628 insertions(+), 22 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_pci1xxxx.c create mode 100644 drivers/tty/serial/8250/8250_pcilib.c create mode 100644 drivers/tty/serial/8250/8250_pcilib.h