[0/2] Add support for Renesas PhiClock 9FGV1006 clock generator

Message ID 20221115192625.9410-1-alexander.helms.jy@renesas.com
Headers
Series Add support for Renesas PhiClock 9FGV1006 clock generator |

Message

Alex Helms Nov. 15, 2022, 7:26 p.m. UTC
  Device tree bindings and a common clock framework device driver for
the Renesas PhiClock 9FGV1006 clock generator.

Alex Helms (2):
  dtbindings: clock: Add bindings for Renesas PhiClock
  clk: Add support for Renesas PhiClock clock generator

 .../bindings/clock/renesas,phiclock.yaml      |  81 ++
 MAINTAINERS                                   |   6 +
 drivers/clk/Kconfig                           |   9 +
 drivers/clk/Makefile                          |   1 +
 drivers/clk/clk-phiclock.c                    | 729 ++++++++++++++++++
 5 files changed, 826 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,phiclock.yaml
 create mode 100644 drivers/clk/clk-phiclock.c


base-commit: 094226ad94f471a9f19e8f8e7140a09c2625abaa