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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gb28-20020a170907961c00b007707b853e46si17712081ejc.882.2022.11.10.01.44.59; Thu, 10 Nov 2022 01:45:24 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=nxFvxU4P; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229942AbiKJJgJ (ORCPT + 99 others); Thu, 10 Nov 2022 04:36:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229947AbiKJJgE (ORCPT ); Thu, 10 Nov 2022 04:36:04 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D8F26A748; Thu, 10 Nov 2022 01:36:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1668072963; x=1699608963; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=8x4LPefT5O63mpdHoa257P3fswbOFkBtg6095GcN42E=; b=nxFvxU4PWQZcYoyA2b8Ugu9Fg+ekDSFQnf45o5Sge+LyraPU5Zz4Xl58 mgdsc8RI/ONbJ10tIJ0k8SzDtYRKmTP6zde69lgY4Agv4vdzupaJob7UZ 34TXH4OmtzLqHFZs3xyXz5J2Z/n5BonXSeuwS5+JWsOYIv+fgw8qbVw8E mGA0f31usWEhtPDCgbNj6VRPC/gV1wuPdfP73jIDqIe0FiVc0Bj+HAcVK GOlNW51orP08qipPIZrK2dBgKK6OsQXRJeiYVBDCfI4TEDZB2DKav6F6b 0UnokgVli29yuBdPJJs06Cfzx67BWvYw9Qi2/4New7CvVRnL1RDyc2mil A==; X-IronPort-AV: E=Sophos;i="5.96,153,1665471600"; d="scan'208";a="188462013" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Nov 2022 02:35:52 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 10 Nov 2022 02:35:52 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 10 Nov 2022 02:35:51 -0700 From: Conor Dooley To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= CC: Daire McNamara , , , , Conor Dooley Subject: [PATCH v12 0/2] Hey Uwe, all, Date: Thu, 10 Nov 2022 09:35:11 +0000 Message-ID: <20221110093512.333881-1-conor.dooley@microchip.com> X-Mailer: git-send-email 2.38.0 MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749101853623977598?= X-GMAIL-MSGID: =?utf-8?q?1749101864108929336?= I've dropped the first two patches, as I applied them last night to my tree, so just the driver & maintainers change here now. The pre 6.0-rc1 cover letter/series is here: https://lore.kernel.org/linux-pwm/20220721172109.941900-1-mail@conchuod.ie Thanks, Conor. Changes since v11: - swap a "bare" multiply & divide for the corresponding helper to prevent overflow - factor out duplicate clk rate acquisition & period calculation - make the period calculation return void by checking the validity of the clock rate in the caller Changes since v10: - reword some comments - try to assign the period if a disable is requested - drop a cast around a u8 -> u16 conversion - fix a check on period_steps that should be on the hw_ variant - split up the period calculation in get_state() to fix the result on 32 bit - add a rate variable in get_state() to only call get_rate() once - redo the locking as suggested to make it more straightforward. - stop checking for enablement in get_state() that was working around intended behaviour of the sysfs interface Changes since v9: - fixed the missing unlock that Dan reported Changes since v8: - fixed a(nother) raw 64 bit division (& built it for riscv32!) - added a check to make sure we don't try to sleep for 0 us Changes since v7: - rebased on 6.0-rc1 - reworded comments you highlighted in v7 - fixed the overkill sleeping - removed the unused variables in calc_duty - added some extra comments to explain behaviours you questioned in v7 - make the mutexes un-interruptible - fixed added the 1s you suggested for the if(period_locked) logic - added setup of the channel_enabled shadowing - fixed the period reporting for the negedge == posedge case in get_state() I had to add the enabled check, as otherwise it broke setting the period for the first time out of reset. - added a test for invalid PERIOD_STEPS values, in which case we abort if we cannot fix the period Changes from v6: - Dropped an unused variable that I'd missed - Actually check the return values of the mutex lock()s - Re-rebased on -next for the MAINTAINERS patch (again...) Changes from v5: - switched to a mutex b/c we must sleep with the lock taken - simplified the locking in apply() and added locking to get_state() - reworked apply() as requested - removed the loop in the period calculation (thanks Uwe!) - add a copy of the enable registers in the driver to save on reads. - remove the second (useless) write to sync_update - added some missing rounding in get_state() - couple other minor cleanups as requested in: https://lore.kernel.org/linux-riscv/20220709160206.cw5luo7kxdshoiua@pengutronix.de/ Changes from v4: - dropped some accidentally added files Conor Dooley (2): pwm: add microchip soft ip corePWM driver MAINTAINERS: add pwm to PolarFire SoC entry MAINTAINERS | 1 + drivers/pwm/Kconfig | 10 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-microchip-core.c | 389 +++++++++++++++++++++++++++++++ 4 files changed, 401 insertions(+) create mode 100644 drivers/pwm/pwm-microchip-core.c