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Tue, 8 Nov 2022 16:39:56 +0000 From: chengwei To: lee@kernel.org, andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org, pavel@ucw.cz Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-leds@vger.kernel.org, GaryWang@aaeon.com.tw, musa.lin@yunjingtech.com, jack.chang@yunjingtech.com, noah.hung@yunjingtech.com, chengwei Subject: [PATCH V2 0/3] Add support control UP board CPLD/FPGA pin control Date: Wed, 9 Nov 2022 00:38:49 +0800 Message-Id: <20221108163852.15926-1-larry.lai@yunjingtech.com> X-Mailer: git-send-email 2.17.1 X-ClientProxiedBy: SI2PR02CA0001.apcprd02.prod.outlook.com (2603:1096:4:194::10) To SG2PR06MB3742.apcprd06.prod.outlook.com (2603:1096:4:d8::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PR06MB3742:EE_|PSAPR06MB4454:EE_ X-MS-Office365-Filtering-Correlation-Id: 564a95df-70b1-4fc9-53e9-08dac1a7de8f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: t6CdMTzufVsP7yWKov7SHihkw/lp8c3nuF3vKHv+YxkN4bxUb49ir/HaDKXY9ejafZaXdDmQ+XgjzF0Sh7+a6QVgptuAAsvfN8QM573RRynOEXbltoQZP18DqPDEbotLojpcjtEsnHDUx9B9IwiQsLZ2IidijNHSeRWs6ZPWnsBMzHN826eqy67lYBGXDS29P4zX1HP3NjeMYFI2IQShr+ISeQpbrR/kz4HPkZeqosCbPSeDdmPIptNozZ+yYt1p6h9pJ9vGFLE5FhvtWpO3ZerWc6ylGArRXzdDAqeRTKdTjP36nuqFvttfv9Cz97Ssun3mGzs7jvy25tNaIWCdA1qpKJl9tiHc54+z5X40bYCURcHJX+VtF+QbewS1dpyiacHjg9SO0PNBgBYLgslvRauMDEv6/gyrGTlAeUhI7RvzLncLQDNV7NIL9cyW+Ck/Wbcr/mQAm0L6vQ//4Zl4hGF1pomwcAbXojkhrtF/jWU0RntIagJJ40mteHJJi5iNkraoHsEv/s3FG35hXsn78j7fR1tjr7MDb+wjkC4XWlisSjQKvdx6sRo6OWr1QVYRgXfbGTvnZuXdmyQ6S1r9+l6k68Uw/jbIXXKQLSQMdBd+wBq6BXpPtnIvhHQp42xbv5QEKqb74aI7ZsPPGsLqUoibYIFVIyzsVddDbL5Y/RAYTTMfOP4xXp0kNVmkqhGk+ExbRvTWtMvhXwjOrvwNkMXToJTaeib9DSS7Fdy2C1xpXFXjRKBDOaxUK7Gtl9BkPXkb86fP0I4f831M2fYut1h5xZOCBQ7wzPgLRjMqLDo/UMtDOIEgchPtleHTv7wB X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SG2PR06MB3742.apcprd06.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230022)(346002)(376002)(39830400003)(396003)(366004)(136003)(451199015)(8936002)(41300700001)(38350700002)(38100700002)(52116002)(6666004)(6506007)(4326008)(66946007)(83380400001)(2906002)(66556008)(66476007)(6512007)(26005)(316002)(5660300002)(86362001)(478600001)(107886003)(6486002)(186003)(36756003)(2616005)(8676002)(1076003)(43062005);DIR:OUT;SFP:1102; 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We want to upstream the UP board 40-pin GP-bus Kernel driver for giving the users better experience on the software release. (not just download from UP board github) These patches are generated from the Linux kernel mainline tag v6.0. Change history: (1) PATCH V2 1 (mfd: Add support for UP board CPLD/FPGA) Refer 2022/10/31 Lee Jones review, fixed some of the issues. (2) PATCH V2 2 (pinctrl: Add support pin control for UP board CPLD/FPGA) Refer 2022/10/19 Mark Brown and Andy Shevchenko review, fixed some of the issues. (3) PATCH V2 3 (leds : Add support for UP board CPLD onboard LEDS) We did git send-email this patch to maintainer on 2022/10/11 for reviewing. there's no change on this LED PATCH V2. chengwei (3): mfd: Add support for UP board CPLD/FPGA pinctrl: Add support pin control for UP board CPLD/FPGA leds: Add support for UP board CPLD onboard LEDS drivers/leds/Kconfig | 10 + drivers/leds/Makefile | 1 + drivers/leds/leds-upboard.c | 78 ++ drivers/mfd/Kconfig | 12 + drivers/mfd/Makefile | 1 + drivers/mfd/upboard-fpga.c | 632 ++++++++++++ drivers/pinctrl/Kconfig | 15 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-upboard.c | 1588 +++++++++++++++++++++++++++++ include/linux/mfd/upboard-fpga.h | 56 + 10 files changed, 2394 insertions(+) create mode 100644 drivers/leds/leds-upboard.c create mode 100644 drivers/mfd/upboard-fpga.c create mode 100644 drivers/pinctrl/pinctrl-upboard.c create mode 100644 include/linux/mfd/upboard-fpga.h